event/octeontx: add selftest to device arguments

Add selftest as a device argument that can be enabled by suppling
'self_test=1' as a vdev parameter

	--vdev="event_octeontx,self_test=1"

The selftest is run after vdev creation is successfully
complete.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

diff --git a/doc/guides/eventdevs/octeontx.rst b/doc/guides/eventdevs/octeontx.rst
index 4d0b22f..4fabe54 100644 (file)
--- a/doc/guides/eventdevs/octeontx.rst
+++ b/doc/guides/eventdevs/octeontx.rst
@@ -83,6 +83,19 @@ Example:
 
     ./your_eventdev_application --vdev="event_octeontx"
 
+
+Selftest
+--------
+
+The functionality of octeontx eventdev can be verified using this option,
+various unit and functional tests are run to verify the sanity.
+The tests are run once the vdev creation is successfully complete.
+
+.. code-block:: console
+
+    --vdev="event_octeontx,self_test=1"
+
+
 Limitations
 -----------
 

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index f20b53d..748ae5f 100644 (file)
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -10,6 +10,7 @@
 #include <rte_eal.h>
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
+#include <rte_kvargs.h>
 #include <rte_lcore.h>
 #include <rte_log.h>
 #include <rte_malloc.h>
@@ -580,6 +581,15 @@ ssovf_close(struct rte_eventdev *dev)
        return 0;
 }
 
+static int
+ssovf_selftest(const char *key __rte_unused, const char *value,
+               void *opaque)
+{
+       int *flag = opaque;
+       *flag = !!atoi(value);
+       return 0;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
        .dev_infos_get    = ssovf_info_get,
@@ -617,7 +627,14 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
        struct rte_eventdev *eventdev;
        static int ssovf_init_once;
        const char *name;
+       const char *params;
        int ret;
+       int selftest = 0;
+
+       static const char *const args[] = {
+               SSOVF_SELFTEST_ARG,
+               NULL
+       };
 
        name = rte_vdev_device_name(vdev);
        /* More than one instance is not supported */
@@ -626,6 +643,28 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
                return -EINVAL;
        }
 
+       params = rte_vdev_device_args(vdev);
+       if (params != NULL && params[0] != '\0') {
+               struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
+
+               if (!kvlist) {
+                       ssovf_log_info(
+                               "Ignoring unsupported params supplied '%s'",
+                               name);
+               } else {
+                       int ret = rte_kvargs_process(kvlist,
+                                       SSOVF_SELFTEST_ARG,
+                                       ssovf_selftest, &selftest);
+                       if (ret != 0) {
+                               ssovf_log_err("%s: Error in selftest", name);
+                               rte_kvargs_free(kvlist);
+                               return ret;
+                       }
+               }
+
+               rte_kvargs_free(kvlist);
+       }
+
        eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
                                rte_socket_id());
        if (eventdev == NULL) {
@@ -676,6 +715,8 @@ ssovf_vdev_probe(struct rte_vdev_device *vdev)
                        edev->max_event_ports);
 
        ssovf_init_once = 1;
+       if (selftest)
+               test_eventdev_octeontx();
        return 0;
 
 error:

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 5c53f7c..d1825b4 100644 (file)
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -80,6 +80,8 @@
 #define SSO_GRP_GET_PRIORITY              0x7
 #define SSO_GRP_SET_PRIORITY              0x8
 
+#define SSOVF_SELFTEST_ARG               ("selftest")
+
 /*
  * In Cavium OcteonTX SoC, all accesses to the device registers are
  * implictly strongly ordered. So, The relaxed version of IO operation is