net/ice/base: use report default config to get PHY capa
authorQi Zhang <qi.z.zhang@intel.com>
Tue, 15 Dec 2020 04:58:27 +0000 (12:58 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 8 Jan 2021 15:03:06 +0000 (16:03 +0100)
In case of new link establishment flow we should use
Report Default Configuration if FW AQ API version
supports it. This patch adds check function for Report
Default Configuration support and updates ice_set_fc(),
ice_cfg_phy_fec() and ice_aq_get_phy_caps() accordingly.

Signed-off-by: Mateusz Pacuszka <mateuszx.pacuszka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
drivers/net/ice/base/ice_adminq_cmd.h
drivers/net/ice/base/ice_common.c
drivers/net/ice/base/ice_common.h
drivers/net/ice/base/ice_type.h

index ff0e712..b07d7d7 100644 (file)
@@ -1213,16 +1213,18 @@ struct ice_aqc_get_phy_caps {
        __le16 param0;
        /* 18.0 - Report qualified modules */
 #define ICE_AQC_GET_PHY_RQM            BIT(0)
-       /* 18.1 - 18.2 : Report mode
-        * 00b - Report NVM capabilities
-        * 01b - Report topology capabilities
-        * 10b - Report SW configured
+       /* 18.1 - 18.3 : Report mode
+        * 000b - Report NVM capabilities
+        * 001b - Report topology capabilities
+        * 010b - Report SW configured
+        * 100b - Report default capabilities
         */
-#define ICE_AQC_REPORT_MODE_S          1
-#define ICE_AQC_REPORT_MODE_M          (3 << ICE_AQC_REPORT_MODE_S)
-#define ICE_AQC_REPORT_NVM_CAP         0
-#define ICE_AQC_REPORT_TOPO_CAP                BIT(1)
-#define ICE_AQC_REPORT_SW_CFG          BIT(2)
+#define ICE_AQC_REPORT_MODE_S                  1
+#define ICE_AQC_REPORT_MODE_M                  (7 << ICE_AQC_REPORT_MODE_S)
+#define ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA       0
+#define ICE_AQC_REPORT_TOPO_CAP                        BIT(1)
+#define ICE_AQC_REPORT_SW_CFG                  BIT(2)
+#define ICE_AQC_REPORT_DFLT_CFG                        BIT(3)
        __le32 reserved1;
        __le32 addr_high;
        __le32 addr_low;
index 5c59dd6..a1dce03 100644 (file)
@@ -161,6 +161,10 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
                return ICE_ERR_PARAM;
        hw = pi->hw;
 
+       if (report_mode == ICE_AQC_REPORT_DFLT_CFG &&
+           !ice_fw_supports_report_dflt_cfg(hw))
+               return ICE_ERR_PARAM;
+
        ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps);
 
        if (qual_mods)
@@ -2965,8 +2969,9 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
                return ICE_ERR_NO_MEMORY;
 
        /* Get the current PHY config */
-       status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
-                                    NULL);
+       status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG,
+                                    pcaps, NULL);
+
        if (status) {
                *aq_failures = ICE_SET_FC_AQ_FAIL_GET;
                goto out;
@@ -3120,8 +3125,11 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
        if (!pcaps)
                return ICE_ERR_NO_MEMORY;
 
-       status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP, pcaps,
-                                    NULL);
+       status = ice_aq_get_phy_caps(pi, false,
+                                    (ice_fw_supports_report_dflt_cfg(hw) ?
+                                     ICE_AQC_REPORT_DFLT_CFG :
+                                     ICE_AQC_REPORT_TOPO_CAP), pcaps, NULL);
+
        if (status)
                goto out;
 
@@ -4951,3 +4959,23 @@ ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
 
        return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
 }
+
+/**
+ * ice_fw_supports_report_dflt_cfg
+ * @hw: pointer to the hardware structure
+ *
+ * Checks if the firmware supports report default configuration
+ */
+bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw)
+{
+       if (hw->api_maj_ver == ICE_FW_API_REPORT_DFLT_CFG_MAJ) {
+               if (hw->api_min_ver > ICE_FW_API_REPORT_DFLT_CFG_MIN)
+                       return true;
+               if (hw->api_min_ver == ICE_FW_API_REPORT_DFLT_CFG_MIN &&
+                   hw->api_patch >= ICE_FW_API_REPORT_DFLT_CFG_PATCH)
+                       return true;
+       } else if (hw->api_maj_ver > ICE_FW_API_REPORT_DFLT_CFG_MAJ) {
+               return true;
+       }
+       return false;
+}
index 4f534a7..ba56f82 100644 (file)
@@ -225,4 +225,5 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
 enum ice_status
 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
+bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
 #endif /* _ICE_COMMON_H_ */
index 4552288..4c84466 100644 (file)
@@ -1243,4 +1243,9 @@ struct ice_aq_get_set_rss_lut_params {
 #define ICE_FW_API_LLDP_FLTR_MAJ       1
 #define ICE_FW_API_LLDP_FLTR_MIN       7
 #define ICE_FW_API_LLDP_FLTR_PATCH     1
+
+/* AQ API version for report default configuration */
+#define ICE_FW_API_REPORT_DFLT_CFG_MAJ         1
+#define ICE_FW_API_REPORT_DFLT_CFG_MIN         7
+#define ICE_FW_API_REPORT_DFLT_CFG_PATCH       3
 #endif /* _ICE_TYPE_H_ */