#define AVF_ARQLEN1_ARQCRIT_SHIFT   30
 #define AVF_ARQLEN1_ARQCRIT_MASK    AVF_MASK(0x1, AVF_ARQLEN1_ARQCRIT_SHIFT)
 #define AVF_ARQLEN1_ARQENABLE_SHIFT 31
-#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1, AVF_ARQLEN1_ARQENABLE_SHIFT)
+#define AVF_ARQLEN1_ARQENABLE_MASK  AVF_MASK(0x1U, AVF_ARQLEN1_ARQENABLE_SHIFT)
 #define AVF_ARQT1            0x00007000 /* Reset: EMPR */
 #define AVF_ARQT1_ARQT_SHIFT 0
 #define AVF_ARQT1_ARQT_MASK  AVF_MASK(0x3FF, AVF_ARQT1_ARQT_SHIFT)
 #define AVF_ATQLEN1_ATQCRIT_SHIFT   30
 #define AVF_ATQLEN1_ATQCRIT_MASK    AVF_MASK(0x1, AVF_ATQLEN1_ATQCRIT_SHIFT)
 #define AVF_ATQLEN1_ATQENABLE_SHIFT 31
-#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1, AVF_ATQLEN1_ATQENABLE_SHIFT)
+#define AVF_ATQLEN1_ATQENABLE_MASK  AVF_MASK(0x1U, AVF_ATQLEN1_ATQENABLE_SHIFT)
 #define AVF_ATQT1            0x00008400 /* Reset: EMPR */
 #define AVF_ATQT1_ATQT_SHIFT 0
 #define AVF_ATQT1_ATQT_MASK  AVF_MASK(0x3FF, AVF_ATQT1_ATQT_SHIFT)