MISC CPT instruction behaves differently based on minor opcode.
Define the missing minor opcodes for MISC major opcode.
Signed-off-by: Aakash Sasidharan <asasidharan@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
#define ROC_SE_MAJOR_OP_HMAC 0x35
#define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
#define ROC_SE_MAJOR_OP_KASUMI 0x38
-#define ROC_SE_MAJOR_OP_MISC 0x01
+
+#define ROC_SE_MAJOR_OP_MISC 0x01
+#define ROC_SE_MISC_MINOR_OP_PASSTHROUGH 0x03
+#define ROC_SE_MISC_MINOR_OP_DUMMY 0x04
+#define ROC_SE_MISC_MINOR_OP_HW_SUPPORT 0x08
#define ROC_SE_MAX_AAD_SIZE 64
#define ROC_SE_MAX_MAC_LEN 64