The cache-misses problem is very serious when the function
lpm_cb_parse_ptype is called to read the content of packets. That is
because the contents of packages previously stored in the cache are
overwritten by the following instructions or variables.
Thus the prefetch order can be used to prefetch the next packet into
the cache to avoid CPU spending too much time on it.
On Octeon TX platform with built-in NIC, 12% performance gain was
measured by running RFC2544 NDR test with l3fwd. Furthermore, the
cache-misses event of the function lpm_cb_parse_ptype was reduced by
20%, and the CPU task-clock of it dropped from 16.49% to 11.3%, based
on the forwarding test for one minute with the 64B packet.
On the dpaa2 platform, no performance improvement nor drop were seen
with this patch by running RFC2544 NDR test with l3fwd.
On the x86 platform, 15.7% performance gain was measured by running
RFC2544 NDR test with l3fwd.
Signed-off-by: Feifei Wang <feifei.wang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
uint16_t max_pkts __rte_unused,
void *user_param __rte_unused)
{
- unsigned i;
-
- for (i = 0; i < nb_pkts; ++i)
+ unsigned int i;
+
+ if (unlikely(nb_pkts == 0))
+ return nb_pkts;
+ rte_prefetch0(rte_pktmbuf_mtod(pkts[0], struct ether_hdr *));
+ for (i = 0; i < (unsigned int) (nb_pkts - 1); ++i) {
+ rte_prefetch0(rte_pktmbuf_mtod(pkts[i+1],
+ struct ether_hdr *));
lpm_parse_ptype(pkts[i]);
+ }
+ lpm_parse_ptype(pkts[i]);
return nb_pkts;
}