bool persist_stats;
};
+struct bnxt_parent_info {
+#define BNXT_PF_FID_INVALID 0xFFFF
+ uint16_t fid;
+ uint16_t vnic;
+ uint16_t port_id;
+ uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
+};
+
struct bnxt_pf_info {
#define BNXT_FIRST_PF_FID 1
#define BNXT_MAX_VFS(bp) ((bp)->pf->max_vfs)
#define BNXT_OUTER_TPID_BD_SHFT 16
uint32_t outer_tpid_bd;
struct bnxt_pf_info *pf;
+ struct bnxt_parent_info *parent;
uint8_t vxlan_port_cnt;
uint8_t geneve_port_cnt;
uint16_t vxlan_port;
#define BNXT_DEVARG_TRUFLOW "host-based-truflow"
#define BNXT_DEVARG_FLOW_XSTAT "flow-xstat"
#define BNXT_DEVARG_MAX_NUM_KFLOWS "max-num-kflows"
+
static const char *const bnxt_dev_args[] = {
BNXT_DEVARG_TRUFLOW,
BNXT_DEVARG_FLOW_XSTAT,
return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_THOR;
}
+static void bnxt_free_parent_info(struct bnxt *bp)
+{
+ rte_free(bp->parent);
+}
+
static void bnxt_free_pf_info(struct bnxt *bp)
{
rte_free(bp->pf);
bp->grp_info = NULL;
}
+static int bnxt_alloc_parent_info(struct bnxt *bp)
+{
+ bp->parent = rte_zmalloc("bnxt_parent_info",
+ sizeof(struct bnxt_parent_info), 0);
+ if (bp->parent == NULL)
+ return -ENOMEM;
+
+ return 0;
+}
+
static int bnxt_alloc_pf_info(struct bnxt *bp)
{
bp->pf = rte_zmalloc("bnxt_pf_info", sizeof(struct bnxt_pf_info), 0);
bnxt_free_cos_queues(bp);
bnxt_free_link_info(bp);
bnxt_free_pf_info(bp);
+ bnxt_free_parent_info(bp);
eth_dev->dev_ops = NULL;
eth_dev->rx_pkt_burst = NULL;
bnxt_hwrm_port_mac_qcfg(bp);
+ bnxt_hwrm_parent_pf_qcfg(bp);
+
rc = bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(bp);
if (rc)
return rc;
if (rc)
goto error_free;
+ rc = bnxt_alloc_parent_info(bp);
+ if (rc)
+ goto error_free;
+
rc = bnxt_alloc_hwrm_resources(bp);
if (rc) {
PMD_DRV_LOG(ERR,
return rc;
}
+int bnxt_hwrm_parent_pf_qcfg(struct bnxt *bp)
+{
+ struct hwrm_func_qcfg_input req = {0};
+ struct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
+ int rc;
+
+ if (!BNXT_VF_IS_TRUSTED(bp))
+ return 0;
+
+ if (!bp->parent)
+ return -EINVAL;
+
+ bp->parent->fid = BNXT_PF_FID_INVALID;
+
+ HWRM_PREP(&req, HWRM_FUNC_QCFG, BNXT_USE_CHIMP_MB);
+
+ req.fid = rte_cpu_to_le_16(0xfffe); /* Request parent PF information. */
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+
+ HWRM_CHECK_RESULT();
+
+ memcpy(bp->parent->mac_addr, resp->mac_address, RTE_ETHER_ADDR_LEN);
+ bp->parent->vnic = rte_le_to_cpu_16(resp->dflt_vnic_id);
+ bp->parent->fid = rte_le_to_cpu_16(resp->fid);
+ bp->parent->port_id = rte_le_to_cpu_16(resp->port_id);
+
+ /* FIXME: Temporary workaround - remove when firmware issue is fixed. */
+ if (bp->parent->vnic == 0) {
+ PMD_DRV_LOG(ERR, "Error: parent VNIC unavailable.\n");
+ /* Use hard-coded values appropriate for current Wh+ fw. */
+ if (bp->parent->fid == 2)
+ bp->parent->vnic = 0x100;
+ else
+ bp->parent->vnic = 1;
+ }
+
+ HWRM_UNLOCK();
+
+ return 0;
+}
+
int bnxt_hwrm_get_dflt_vnic_svif(struct bnxt *bp, uint16_t fid,
uint16_t *vnic_id, uint16_t *svif)
{
uint16_t *vnic_id);
int bnxt_hwrm_get_dflt_vnic_svif(struct bnxt *bp, uint16_t fid,
uint16_t *vnic_id, uint16_t *svif);
+int bnxt_hwrm_parent_pf_qcfg(struct bnxt *bp);
#endif