STATIC s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,
u8 *sff8472_data);
/**
- * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
- * @hw: pointer to the HW structure
+ * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
+ * @hw: pointer to the HW structure
*
- * The defaults for 82598 should be in the range of 50us to 50ms,
- * however the hardware default for these parts is 500us to 1ms which is less
- * than the 10ms recommended by the pci-e spec. To address this we need to
- * increase the value to either 10ms to 250ms for capability version 1 config,
- * or 16ms to 55ms for version 2.
+ * The defaults for 82598 should be in the range of 50us to 50ms,
+ * however the hardware default for these parts is 500us to 1ms which is less
+ * than the 10ms recommended by the pci-e spec. To address this we need to
+ * increase the value to either 10ms to 250ms for capability version 1 config,
+ * or 16ms to 55ms for version 2.
**/
void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_ops_82598 - Inits func ptrs and MAC type
- * @hw: pointer to hardware structure
+ * ixgbe_init_ops_82598 - Inits func ptrs and MAC type
+ * @hw: pointer to hardware structure
*
- * Initialize the function pointers and assign the MAC type for 82598.
- * Does not touch the hardware.
+ * Initialize the function pointers and assign the MAC type for 82598.
+ * Does not touch the hardware.
**/
s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_phy_ops_82598 - PHY/SFP specific init
- * @hw: pointer to hardware structure
+ * ixgbe_init_phy_ops_82598 - PHY/SFP specific init
+ * @hw: pointer to hardware structure
*
- * Initialize any function pointers that were not able to be
- * set during init_shared_code because the PHY/SFP type was
- * not known. Perform the SFP init if necessary.
+ * Initialize any function pointers that were not able to be
+ * set during init_shared_code because the PHY/SFP type was
+ * not known. Perform the SFP init if necessary.
*
**/
s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
}
/**
- * ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware using the generic start_hw function.
- * Disables relaxed ordering Then set pcie completion timeout
+ * Starts the hardware using the generic start_hw function.
+ * Disables relaxed ordering Then set pcie completion timeout
*
**/
s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
}
/**
- * ixgbe_get_link_capabilities_82598 - Determines link capabilities
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @autoneg: boolean auto-negotiation value
+ * ixgbe_get_link_capabilities_82598 - Determines link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @autoneg: boolean auto-negotiation value
*
- * Determines the link capabilities by reading the AUTOC register.
+ * Determines the link capabilities by reading the AUTOC register.
**/
STATIC s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
}
/**
- * ixgbe_get_media_type_82598 - Determines media type
- * @hw: pointer to hardware structure
+ * ixgbe_get_media_type_82598 - Determines media type
+ * @hw: pointer to hardware structure
*
- * Returns the media type (fiber, copper, backplane)
+ * Returns the media type (fiber, copper, backplane)
**/
STATIC enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_enable_82598 - Enable flow control
- * @hw: pointer to hardware structure
+ * ixgbe_fc_enable_82598 - Enable flow control
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to the current settings.
+ * Enable flow control according to the current settings.
**/
s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_mac_link_82598 - Configures MAC link settings
- * @hw: pointer to hardware structure
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_start_mac_link_82598 - Configures MAC link settings
+ * @hw: pointer to hardware structure
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Configures link settings based on values in the ixgbe_hw struct.
- * Restarts the link. Performs autonegotiation if needed.
+ * Configures link settings based on values in the ixgbe_hw struct.
+ * Restarts the link. Performs autonegotiation if needed.
**/
STATIC s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_validate_link_ready - Function looks for phy link
- * @hw: pointer to hardware structure
+ * ixgbe_validate_link_ready - Function looks for phy link
+ * @hw: pointer to hardware structure
*
- * Function indicates success when phy link is available. If phy is not ready
- * within 5 seconds of MAC indicating link, the function returns error.
+ * Function indicates success when phy link is available. If phy is not ready
+ * within 5 seconds of MAC indicating link, the function returns error.
**/
STATIC s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_check_mac_link_82598 - Get link/speed status
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @link_up: true is link is up, false otherwise
- * @link_up_wait_to_complete: bool used to wait for link up or not
+ * ixgbe_check_mac_link_82598 - Get link/speed status
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @link_up: true is link is up, false otherwise
+ * @link_up_wait_to_complete: bool used to wait for link up or not
*
- * Reads the links register to determine if link is up and the current speed
+ * Reads the links register to determine if link is up and the current speed
**/
STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
ixgbe_link_speed *speed, bool *link_up,
}
/**
- * ixgbe_setup_mac_link_82598 - Set MAC link speed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_82598 - Set MAC link speed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Set the link speed in the AUTOC register and restarts link.
+ * Set the link speed in the AUTOC register and restarts link.
**/
STATIC s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
/**
- * ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true if waiting is needed to complete
+ * ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true if waiting is needed to complete
*
- * Sets the link speed in the AUTOC register in the MAC and restarts link.
+ * Sets the link speed in the AUTOC register in the MAC and restarts link.
**/
STATIC s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_reset_hw_82598 - Performs hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw_82598 - Performs hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks and
- * clears all interrupts, performing a PHY reset, and performing a link (MAC)
- * reset.
+ * Resets the hardware by resetting the transmit and receive units, masks and
+ * clears all interrupts, performing a PHY reset, and performing a link (MAC)
+ * reset.
**/
STATIC s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address
- * @hw: pointer to hardware struct
- * @rar: receive address register index to associate with a VMDq index
- * @vmdq: VMDq set index
+ * ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address
+ * @hw: pointer to hardware struct
+ * @rar: receive address register index to associate with a VMDq index
+ * @vmdq: VMDq set index
**/
s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address
- * @hw: pointer to hardware struct
- * @rar: receive address register index to associate with a VMDq index
- * @vmdq: VMDq clear index (not used in 82598, but elsewhere)
+ * ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address
+ * @hw: pointer to hardware struct
+ * @rar: receive address register index to associate with a VMDq index
+ * @vmdq: VMDq clear index (not used in 82598, but elsewhere)
**/
STATIC s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * ixgbe_set_vfta_82598 - Set VLAN filter table
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vind: VMDq output index that maps queue to VLAN id in VFTA
- * @vlan_on: boolean flag to turn on/off VLAN in VFTA
- * @vlvf_bypass: boolean flag - unused
+ * ixgbe_set_vfta_82598 - Set VLAN filter table
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vind: VMDq output index that maps queue to VLAN id in VFTA
+ * @vlan_on: boolean flag to turn on/off VLAN in VFTA
+ * @vlvf_bypass: boolean flag - unused
*
- * Turn on/off specified VLAN in the VLAN filter table.
+ * Turn on/off specified VLAN in the VLAN filter table.
**/
s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, bool vlvf_bypass)
}
/**
- * ixgbe_clear_vfta_82598 - Clear VLAN filter table
- * @hw: pointer to hardware structure
+ * ixgbe_clear_vfta_82598 - Clear VLAN filter table
+ * @hw: pointer to hardware structure
*
- * Clears the VLAN filer table, and the VMDq index associated with the filter
+ * Clears the VLAN filer table, and the VMDq index associated with the filter
**/
STATIC s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register
- * @hw: pointer to hardware structure
- * @reg: analog register to read
- * @val: read value
+ * ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register
+ * @hw: pointer to hardware structure
+ * @reg: analog register to read
+ * @val: read value
*
- * Performs read operation to Atlas analog register specified.
+ * Performs read operation to Atlas analog register specified.
**/
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)
{
}
/**
- * ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register
- * @hw: pointer to hardware structure
- * @reg: atlas register to write
- * @val: value to write
+ * ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register
+ * @hw: pointer to hardware structure
+ * @reg: atlas register to write
+ * @val: value to write
*
- * Performs write operation to Atlas analog register specified.
+ * Performs write operation to Atlas analog register specified.
**/
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)
{
}
/**
- * ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface.
- * @hw: pointer to hardware structure
- * @dev_addr: address to read from
- * @byte_offset: byte offset to read from dev_addr
- * @eeprom_data: value read
+ * ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface.
+ * @hw: pointer to hardware structure
+ * @dev_addr: address to read from
+ * @byte_offset: byte offset to read from dev_addr
+ * @eeprom_data: value read
*
- * Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
**/
STATIC s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr,
u8 byte_offset, u8 *eeprom_data)
}
/**
- * ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
- * @hw: pointer to hardware structure
- * @byte_offset: EEPROM byte offset to read
- * @eeprom_data: value read
+ * ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
+ * @hw: pointer to hardware structure
+ * @byte_offset: EEPROM byte offset to read
+ * @eeprom_data: value read
*
- * Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
u8 *eeprom_data)
}
/**
- * ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface.
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset at address 0xA2
- * @sff8472_data: value read
+ * ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface.
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset at address 0xA2
+ * @sff8472_data: value read
*
- * Performs 8 byte read operation to SFP module's SFF-8472 data over I2C
+ * Performs 8 byte read operation to SFP module's SFF-8472 data over I2C
**/
STATIC s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,
u8 *sff8472_data)
}
/**
- * ixgbe_get_supported_physical_layer_82598 - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_physical_layer_82598 - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current configuration.
+ * Determines physical layer capabilities of the current configuration.
**/
u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_lan_id_multi_port_pcie_82598 - Set LAN id for PCIe multiple
- * port devices.
- * @hw: pointer to the HW structure
+ * ixgbe_set_lan_id_multi_port_pcie_82598 - Set LAN id for PCIe multiple
+ * port devices.
+ * @hw: pointer to the HW structure
*
- * Calls common function and corrects issue with some single port devices
- * that enable LAN1 but not LAN0.
+ * Calls common function and corrects issue with some single port devices
+ * that enable LAN1 but not LAN0.
**/
void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_relaxed_ordering_82598 - enable relaxed ordering
- * @hw: pointer to hardware structure
+ * ixgbe_enable_relaxed_ordering_82598 - enable relaxed ordering
+ * @hw: pointer to hardware structure
*
**/
void ixgbe_enable_relaxed_ordering_82598(struct ixgbe_hw *hw)
}
/**
- * ixgbe_enable_rx_dma_82598 - Enable the Rx DMA unit
- * @hw: pointer to hardware structure
- * @regval: register value to write to RXCTRL
+ * ixgbe_enable_rx_dma_82598 - Enable the Rx DMA unit
+ * @hw: pointer to hardware structure
+ * @regval: register value to write to RXCTRL
*
- * Enables the Rx DMA unit
+ * Enables the Rx DMA unit
**/
s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)
{
}
/**
- * ixgbe_init_phy_ops_82599 - PHY/SFP specific init
- * @hw: pointer to hardware structure
+ * ixgbe_init_phy_ops_82599 - PHY/SFP specific init
+ * @hw: pointer to hardware structure
*
- * Initialize any function pointers that were not able to be
- * set during init_shared_code because the PHY/SFP type was
- * not known. Perform the SFP init if necessary.
+ * Initialize any function pointers that were not able to be
+ * set during init_shared_code because the PHY/SFP type was
+ * not known. Perform the SFP init if necessary.
*
**/
s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
}
/**
- * prot_autoc_read_82599 - Hides MAC differences needed for AUTOC read
- * @hw: pointer to hardware structure
- * @locked: Return the if we locked for this read.
- * @reg_val: Value we read from AUTOC
+ * prot_autoc_read_82599 - Hides MAC differences needed for AUTOC read
+ * @hw: pointer to hardware structure
+ * @locked: Return the if we locked for this read.
+ * @reg_val: Value we read from AUTOC
*
- * For this part (82599) we need to wrap read-modify-writes with a possible
- * FW/SW lock. It is assumed this lock will be freed with the next
- * prot_autoc_write_82599().
+ * For this part (82599) we need to wrap read-modify-writes with a possible
+ * FW/SW lock. It is assumed this lock will be freed with the next
+ * prot_autoc_write_82599().
*/
s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
{
* @hw: pointer to hardware structure
* @autoc: value to write to AUTOC
* @locked: bool to indicate whether the SW/FW lock was already taken by
- * previous proc_autoc_read_82599.
+ * previous proc_autoc_read_82599.
*
* This part (82599) may need to hold the SW/FW lock around all writes to
* AUTOC. Likewise after a write we need to do a pipeline reset.
}
/**
- * ixgbe_init_ops_82599 - Inits func ptrs and MAC type
- * @hw: pointer to hardware structure
+ * ixgbe_init_ops_82599 - Inits func ptrs and MAC type
+ * @hw: pointer to hardware structure
*
- * Initialize the function pointers and assign the MAC type for 82599.
- * Does not touch the hardware.
+ * Initialize the function pointers and assign the MAC type for 82599.
+ * Does not touch the hardware.
**/
s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw)
}
/**
- * ixgbe_get_link_capabilities_82599 - Determines link capabilities
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @autoneg: true when autoneg or autotry is enabled
+ * ixgbe_get_link_capabilities_82599 - Determines link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @autoneg: true when autoneg or autotry is enabled
*
- * Determines the link capabilities by reading the AUTOC register.
+ * Determines the link capabilities by reading the AUTOC register.
**/
s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
}
/**
- * ixgbe_get_media_type_82599 - Get media type
- * @hw: pointer to hardware structure
+ * ixgbe_get_media_type_82599 - Get media type
+ * @hw: pointer to hardware structure
*
- * Returns the media type (fiber, copper, backplane)
+ * Returns the media type (fiber, copper, backplane)
**/
enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3
- * @hw: pointer to hardware structure
+ * ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3
+ * @hw: pointer to hardware structure
*
- * Disables link during D3 power down sequence.
+ * Disables link during D3 power down sequence.
*
**/
void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
}
/**
- * ixgbe_start_mac_link_82599 - Setup MAC link settings
- * @hw: pointer to hardware structure
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_start_mac_link_82599 - Setup MAC link settings
+ * @hw: pointer to hardware structure
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Configures link settings based on values in the ixgbe_hw struct.
- * Restarts the link. Performs autonegotiation if needed.
+ * Configures link settings based on values in the ixgbe_hw struct.
+ * Restarts the link. Performs autonegotiation if needed.
**/
s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_disable_tx_laser_multispeed_fiber - Disable Tx laser
- * @hw: pointer to hardware structure
+ * ixgbe_disable_tx_laser_multispeed_fiber - Disable Tx laser
+ * @hw: pointer to hardware structure
*
- * The base drivers may require better control over SFP+ module
- * PHY states. This includes selectively shutting down the Tx
- * laser on the PHY, effectively halting physical link.
+ * The base drivers may require better control over SFP+ module
+ * PHY states. This includes selectively shutting down the Tx
+ * laser on the PHY, effectively halting physical link.
**/
void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_tx_laser_multispeed_fiber - Enable Tx laser
- * @hw: pointer to hardware structure
+ * ixgbe_enable_tx_laser_multispeed_fiber - Enable Tx laser
+ * @hw: pointer to hardware structure
*
- * The base drivers may require better control over SFP+ module
- * PHY states. This includes selectively turning on the Tx
- * laser on the PHY, effectively starting physical link.
+ * The base drivers may require better control over SFP+ module
+ * PHY states. This includes selectively turning on the Tx
+ * laser on the PHY, effectively starting physical link.
**/
void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_flap_tx_laser_multispeed_fiber - Flap Tx laser
- * @hw: pointer to hardware structure
+ * ixgbe_flap_tx_laser_multispeed_fiber - Flap Tx laser
+ * @hw: pointer to hardware structure
*
- * When the driver changes the link speeds that it can support,
- * it sets autotry_restart to true to indicate that we need to
- * initiate a new autotry session with the link partner. To do
- * so, we set the speed then disable and re-enable the Tx laser, to
- * alert the link partner that it also needs to restart autotry on its
- * end. This is consistent with true clause 37 autoneg, which also
- * involves a loss of signal.
+ * When the driver changes the link speeds that it can support,
+ * it sets autotry_restart to true to indicate that we need to
+ * initiate a new autotry session with the link partner. To do
+ * so, we set the speed then disable and re-enable the Tx laser, to
+ * alert the link partner that it also needs to restart autotry on its
+ * end. This is consistent with true clause 37 autoneg, which also
+ * involves a loss of signal.
**/
void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_hard_rate_select_speed - Set module link speed
- * @hw: pointer to hardware structure
- * @speed: link speed to set
+ * ixgbe_set_hard_rate_select_speed - Set module link speed
+ * @hw: pointer to hardware structure
+ * @speed: link speed to set
*
- * Set module link speed via RS0/RS1 rate select pins.
+ * Set module link speed via RS0/RS1 rate select pins.
*/
void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw,
ixgbe_link_speed speed)
}
/**
- * ixgbe_setup_mac_link_smartspeed - Set MAC link speed using SmartSpeed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_smartspeed - Set MAC link speed using SmartSpeed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Implements the Intel SmartSpeed algorithm.
+ * Implements the Intel SmartSpeed algorithm.
**/
s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_setup_mac_link_82599 - Set MAC link speed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_82599 - Set MAC link speed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Set the link speed in the AUTOC register and restarts link.
+ * Set the link speed in the AUTOC register and restarts link.
**/
s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_setup_copper_link_82599 - Set the PHY autoneg advertised field
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true if waiting is needed to complete
+ * ixgbe_setup_copper_link_82599 - Set the PHY autoneg advertised field
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true if waiting is needed to complete
*
- * Restarts link on PHY and MAC based on settings passed in.
+ * Restarts link on PHY and MAC based on settings passed in.
**/
STATIC s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_reset_hw_82599 - Perform hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw_82599 - Perform hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks
- * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
- * reset.
+ * Resets the hardware by resetting the transmit and receive units, masks
+ * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
+ * reset.
**/
s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_reinit_fdir_tables_82599 - Reinitialize Flow Director tables.
- * @hw: pointer to hardware structure
+ * ixgbe_reinit_fdir_tables_82599 - Reinitialize Flow Director tables.
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers
- * @hw: pointer to hardware structure
- * @fdirctrl: value to write to flow director control register
+ * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers
+ * @hw: pointer to hardware structure
+ * @fdirctrl: value to write to flow director control register
**/
STATIC void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)
{
}
/**
- * ixgbe_init_fdir_signature_82599 - Initialize Flow Director signature filters
- * @hw: pointer to hardware structure
- * @fdirctrl: value to write to flow director control register, initially
+ * ixgbe_init_fdir_signature_82599 - Initialize Flow Director signature filters
+ * @hw: pointer to hardware structure
+ * @fdirctrl: value to write to flow director control register, initially
* contains just the value of the Rx packet buffer allocation
**/
s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
}
/**
- * ixgbe_init_fdir_perfect_82599 - Initialize Flow Director perfect filters
- * @hw: pointer to hardware structure
- * @fdirctrl: value to write to flow director control register, initially
+ * ixgbe_init_fdir_perfect_82599 - Initialize Flow Director perfect filters
+ * @hw: pointer to hardware structure
+ * @fdirctrl: value to write to flow director control register, initially
* contains just the value of the Rx packet buffer allocation
- * @cloud_mode: true - cloud mode, false - other mode
+ * @cloud_mode: true - cloud mode, false - other mode
**/
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
bool cloud_mode)
}
/**
- * ixgbe_set_fdir_drop_queue_82599 - Set Flow Director drop queue
- * @hw: pointer to hardware structure
- * @dropqueue: Rx queue index used for the dropped packets
+ * ixgbe_set_fdir_drop_queue_82599 - Set Flow Director drop queue
+ * @hw: pointer to hardware structure
+ * @dropqueue: Rx queue index used for the dropped packets
**/
void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue)
{
} while (0)
/**
- * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash
- * @input: input bitstream to compute the hash on
- * @common: compressed common input dword
+ * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash
+ * @input: input bitstream to compute the hash on
+ * @common: compressed common input dword
*
- * This function is almost identical to the function above but contains
- * several optimizations such as unwinding all of the loops, letting the
- * compiler work out all of the conditional ifs since the keys are static
- * defines, and computing two keys at once since the hashed dword stream
- * will be the same for both keys.
+ * This function is almost identical to the function above but contains
+ * several optimizations such as unwinding all of the loops, letting the
+ * compiler work out all of the conditional ifs since the keys are static
+ * defines, and computing two keys at once since the hashed dword stream
+ * will be the same for both keys.
**/
u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
union ixgbe_atr_hash_dword common)
}
/**
- * ixgbe_atr_add_signature_filter_82599 - Adds a signature hash filter
- * @hw: pointer to hardware structure
- * @input: unique input dword
- * @common: compressed common input dword
- * @queue: queue index to direct traffic to
+ * ixgbe_atr_add_signature_filter_82599 - Adds a signature hash filter
+ * @hw: pointer to hardware structure
+ * @input: unique input dword
+ * @common: compressed common input dword
+ * @queue: queue index to direct traffic to
*
* Note that the tunnel bit in input must not be set when the hardware
* tunneling support does not exist.
} while (0)
/**
- * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash
- * @input: input bitstream to compute the hash on
- * @input_mask: mask for the input bitstream
+ * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash
+ * @input: input bitstream to compute the hash on
+ * @input_mask: mask for the input bitstream
*
- * This function serves two main purposes. First it applies the input_mask
- * to the atr_input resulting in a cleaned up atr_input data stream.
- * Secondly it computes the hash and stores it in the bkt_hash field at
- * the end of the input byte stream. This way it will be available for
- * future use without needing to recompute the hash.
+ * This function serves two main purposes. First it applies the input_mask
+ * to the atr_input resulting in a cleaned up atr_input data stream.
+ * Secondly it computes the hash and stores it in the bkt_hash field at
+ * the end of the input byte stream. This way it will be available for
+ * future use without needing to recompute the hash.
**/
void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
union ixgbe_atr_input *input_mask)
}
/**
- * ixgbe_get_fdirtcpm_82599 - generate a TCP port from atr_input_masks
- * @input_mask: mask to be bit swapped
+ * ixgbe_get_fdirtcpm_82599 - generate a TCP port from atr_input_masks
+ * @input_mask: mask to be bit swapped
*
- * The source and destination port masks for flow director are bit swapped
- * in that bit 15 effects bit 0, 14 effects 1, 13, 2 etc. In order to
- * generate a correctly swapped value we need to bit swap the mask and that
- * is what is accomplished by this function.
+ * The source and destination port masks for flow director are bit swapped
+ * in that bit 15 effects bit 0, 14 effects 1, 13, 2 etc. In order to
+ * generate a correctly swapped value we need to bit swap the mask and that
+ * is what is accomplished by this function.
**/
STATIC u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask)
{
}
/**
- * ixgbe_fdir_add_perfect_filter_82599 - Adds a perfect filter
- * @hw: pointer to hardware structure
- * @input: input bitstream
- * @input_mask: mask for the input bitstream
- * @soft_id: software index for the filters
- * @queue: queue index to direct traffic to
- * @cloud_mode: unused
+ * ixgbe_fdir_add_perfect_filter_82599 - Adds a perfect filter
+ * @hw: pointer to hardware structure
+ * @input: input bitstream
+ * @input_mask: mask for the input bitstream
+ * @soft_id: software index for the filters
+ * @queue: queue index to direct traffic to
+ * @cloud_mode: unused
*
- * Note that the caller to this function must lock before calling, since the
- * hardware writes must be protected from one another.
+ * Note that the caller to this function must lock before calling, since the
+ * hardware writes must be protected from one another.
**/
s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
union ixgbe_atr_input *input,
}
/**
- * ixgbe_read_analog_reg8_82599 - Reads 8 bit Omer analog register
- * @hw: pointer to hardware structure
- * @reg: analog register to read
- * @val: read value
+ * ixgbe_read_analog_reg8_82599 - Reads 8 bit Omer analog register
+ * @hw: pointer to hardware structure
+ * @reg: analog register to read
+ * @val: read value
*
- * Performs read operation to Omer analog register specified.
+ * Performs read operation to Omer analog register specified.
**/
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)
{
}
/**
- * ixgbe_write_analog_reg8_82599 - Writes 8 bit Omer analog register
- * @hw: pointer to hardware structure
- * @reg: atlas register to write
- * @val: value to write
+ * ixgbe_write_analog_reg8_82599 - Writes 8 bit Omer analog register
+ * @hw: pointer to hardware structure
+ * @reg: atlas register to write
+ * @val: value to write
*
- * Performs write operation to Omer analog register specified.
+ * Performs write operation to Omer analog register specified.
**/
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)
{
}
/**
- * ixgbe_start_hw_82599 - Prepare hardware for Tx/Rx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw_82599 - Prepare hardware for Tx/Rx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware using the generic start_hw function
- * and the generation start_hw function.
- * Then performs revision-specific operations, if any.
+ * Starts the hardware using the generic start_hw function
+ * and the generation start_hw function.
+ * Then performs revision-specific operations, if any.
**/
s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_identify_phy_82599 - Get physical layer module
- * @hw: pointer to hardware structure
+ * ixgbe_identify_phy_82599 - Get physical layer module
+ * @hw: pointer to hardware structure
*
- * Determines the physical layer module found on the current adapter.
- * If PHY already detected, maintains current PHY type in hw struct,
- * otherwise executes the PHY detection routine.
+ * Determines the physical layer module found on the current adapter.
+ * If PHY already detected, maintains current PHY type in hw struct,
+ * otherwise executes the PHY detection routine.
**/
s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_supported_physical_layer_82599 - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_physical_layer_82599 - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current configuration.
+ * Determines physical layer capabilities of the current configuration.
**/
u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_rx_dma_82599 - Enable the Rx DMA unit on 82599
- * @hw: pointer to hardware structure
- * @regval: register value to write to RXCTRL
+ * ixgbe_enable_rx_dma_82599 - Enable the Rx DMA unit on 82599
+ * @hw: pointer to hardware structure
+ * @regval: register value to write to RXCTRL
*
- * Enables the Rx DMA unit for 82599
+ * Enables the Rx DMA unit for 82599
**/
s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)
{
}
/**
- * ixgbe_verify_fw_version_82599 - verify FW version for 82599
- * @hw: pointer to hardware structure
+ * ixgbe_verify_fw_version_82599 - verify FW version for 82599
+ * @hw: pointer to hardware structure
*
- * Verifies that installed the firmware version is 0.6 or higher
- * for SFI devices. All 82599 SFI devices should have version 0.6 or higher.
+ * Verifies that installed the firmware version is 0.6 or higher
+ * for SFI devices. All 82599 SFI devices should have version 0.6 or higher.
*
- * Returns IXGBE_ERR_EEPROM_VERSION if the FW is not present or
- * if the FW version is not supported.
+ * Returns IXGBE_ERR_EEPROM_VERSION if the FW is not present or
+ * if the FW version is not supported.
**/
STATIC s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state.
- * @hw: pointer to hardware structure
+ * ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state.
+ * @hw: pointer to hardware structure
*
- * Returns true if the LESM FW module is present and enabled. Otherwise
- * returns false. Smart Speed must be disabled if LESM FW module is enabled.
+ * Returns true if the LESM FW module is present and enabled. Otherwise
+ * returns false. Smart Speed must be disabled if LESM FW module is enabled.
**/
bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_eeprom_buffer_82599 - Read EEPROM word(s) using
- * fastest available method
+ * ixgbe_read_eeprom_buffer_82599 - Read EEPROM word(s) using
+ * fastest available method
*
- * @hw: pointer to hardware structure
- * @offset: offset of word in EEPROM to read
- * @words: number of words
- * @data: word(s) read from the EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in EEPROM to read
+ * @words: number of words
+ * @data: word(s) read from the EEPROM
*
- * Retrieves 16 bit word(s) read from EEPROM
+ * Retrieves 16 bit word(s) read from EEPROM
**/
STATIC s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_read_eeprom_82599 - Read EEPROM word using
- * fastest available method
+ * ixgbe_read_eeprom_82599 - Read EEPROM word using
+ * fastest available method
*
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @data: word read from the EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @data: word read from the EEPROM
*
- * Reads a 16 bit word from the EEPROM
+ * Reads a 16 bit word from the EEPROM
**/
STATIC s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
u16 offset, u16 *data)
/**
* ixgbe_reset_pipeline_82599 - perform pipeline reset
*
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*
* Reset pipeline by asserting Restart_AN together with LMS change to ensure
* full pipeline reset. This function assumes the SW/FW lock is held.
}
/**
- * ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: address to read from
- * @data: value read
+ * ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: address to read from
+ * @data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
STATIC s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data)
}
/**
- * ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: address to read from
- * @data: value to write
+ * ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: address to read from
+ * @data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
STATIC s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data)
}
/**
- * ixgbe_init_shared_code - Initialize the shared code
- * @hw: pointer to hardware structure
+ * ixgbe_init_shared_code - Initialize the shared code
+ * @hw: pointer to hardware structure
*
- * This will assign function pointers and assign the MAC type and PHY code.
- * Does not touch the hardware. This function must be called prior to any
- * other function in the shared code. The ixgbe_hw structure should be
- * memset to 0 prior to calling this function. The following fields in
- * hw structure should be filled in prior to calling this function:
- * hw_addr, back, device_id, vendor_id, subsystem_device_id,
- * subsystem_vendor_id, and revision_id
+ * This will assign function pointers and assign the MAC type and PHY code.
+ * Does not touch the hardware. This function must be called prior to any
+ * other function in the shared code. The ixgbe_hw structure should be
+ * memset to 0 prior to calling this function. The following fields in
+ * hw structure should be filled in prior to calling this function:
+ * hw_addr, back, device_id, vendor_id, subsystem_device_id,
+ * subsystem_vendor_id, and revision_id
**/
s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_mac_type - Sets MAC type
- * @hw: pointer to the HW structure
+ * ixgbe_set_mac_type - Sets MAC type
+ * @hw: pointer to the HW structure
*
- * This function sets the mac type of the adapter based on the
- * vendor ID and device ID stored in the hw structure.
+ * This function sets the mac type of the adapter based on the
+ * vendor ID and device ID stored in the hw structure.
**/
s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_hw - Initialize the hardware
- * @hw: pointer to hardware structure
+ * ixgbe_init_hw - Initialize the hardware
+ * @hw: pointer to hardware structure
*
- * Initialize the hardware by resetting and then starting the hardware
+ * Initialize the hardware by resetting and then starting the hardware
**/
s32 ixgbe_init_hw(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_reset_hw - Performs a hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw - Performs a hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks and
- * clears all interrupts, performs a PHY reset, and performs a MAC reset
+ * Resets the hardware by resetting the transmit and receive units, masks and
+ * clears all interrupts, performs a PHY reset, and performs a MAC reset
**/
s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_hw - Prepares hardware for Rx/Tx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw - Prepares hardware for Rx/Tx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware by filling the bus info structure and media type,
- * clears all on chip counters, initializes receive address registers,
- * multicast table, VLAN filter table, calls routine to setup link and
- * flow control settings, and leaves transmit and receive units disabled
- * and uninitialized.
+ * Starts the hardware by filling the bus info structure and media type,
+ * clears all on chip counters, initializes receive address registers,
+ * multicast table, VLAN filter table, calls routine to setup link and
+ * flow control settings, and leaves transmit and receive units disabled
+ * and uninitialized.
**/
s32 ixgbe_start_hw(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
- * which is disabled by default in ixgbe_start_hw();
+ * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
+ * which is disabled by default in ixgbe_start_hw();
*
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*
- * Enable relaxed ordering;
+ * Enable relaxed ordering;
**/
void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_clear_hw_cntrs - Clear hardware counters
- * @hw: pointer to hardware structure
+ * ixgbe_clear_hw_cntrs - Clear hardware counters
+ * @hw: pointer to hardware structure
*
- * Clears all hardware statistics counters by reading them from the hardware
- * Statistics counters are clear on read.
+ * Clears all hardware statistics counters by reading them from the hardware
+ * Statistics counters are clear on read.
**/
s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_media_type - Get media type
- * @hw: pointer to hardware structure
+ * ixgbe_get_media_type - Get media type
+ * @hw: pointer to hardware structure
*
- * Returns the media type (fiber, copper, backplane)
+ * Returns the media type (fiber, copper, backplane)
**/
enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_mac_addr - Get MAC address
- * @hw: pointer to hardware structure
- * @mac_addr: Adapter MAC address
+ * ixgbe_get_mac_addr - Get MAC address
+ * @hw: pointer to hardware structure
+ * @mac_addr: Adapter MAC address
*
- * Reads the adapter's MAC address from the first Receive Address Register
- * (RAR0) A reset of the adapter must have been performed prior to calling
- * this function in order for the MAC address to have been loaded from the
- * EEPROM into RAR0
+ * Reads the adapter's MAC address from the first Receive Address Register
+ * (RAR0) A reset of the adapter must have been performed prior to calling
+ * this function in order for the MAC address to have been loaded from the
+ * EEPROM into RAR0
**/
s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
{
}
/**
- * ixgbe_get_san_mac_addr - Get SAN MAC address
- * @hw: pointer to hardware structure
- * @san_mac_addr: SAN MAC address
+ * ixgbe_get_san_mac_addr - Get SAN MAC address
+ * @hw: pointer to hardware structure
+ * @san_mac_addr: SAN MAC address
*
- * Reads the SAN MAC address from the EEPROM, if it's available. This is
- * per-port, so set_lan_id() must be called before reading the addresses.
+ * Reads the SAN MAC address from the EEPROM, if it's available. This is
+ * per-port, so set_lan_id() must be called before reading the addresses.
**/
s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
}
/**
- * ixgbe_set_san_mac_addr - Write a SAN MAC address
- * @hw: pointer to hardware structure
- * @san_mac_addr: SAN MAC address
+ * ixgbe_set_san_mac_addr - Write a SAN MAC address
+ * @hw: pointer to hardware structure
+ * @san_mac_addr: SAN MAC address
*
- * Writes A SAN MAC address to the EEPROM.
+ * Writes A SAN MAC address to the EEPROM.
**/
s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
}
/**
- * ixgbe_get_device_caps - Get additional device capabilities
- * @hw: pointer to hardware structure
- * @device_caps: the EEPROM word for device capabilities
+ * ixgbe_get_device_caps - Get additional device capabilities
+ * @hw: pointer to hardware structure
+ * @device_caps: the EEPROM word for device capabilities
*
- * Reads the extra device capabilities from the EEPROM
+ * Reads the extra device capabilities from the EEPROM
**/
s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
{
}
/**
- * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
- * @hw: pointer to hardware structure
- * @wwnn_prefix: the alternative WWNN prefix
- * @wwpn_prefix: the alternative WWPN prefix
+ * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
+ * @hw: pointer to hardware structure
+ * @wwnn_prefix: the alternative WWNN prefix
+ * @wwpn_prefix: the alternative WWPN prefix
*
- * This function will read the EEPROM from the alternative SAN MAC address
- * block to check the support for the alternative WWNN/WWPN prefix support.
+ * This function will read the EEPROM from the alternative SAN MAC address
+ * block to check the support for the alternative WWNN/WWPN prefix support.
**/
s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
u16 *wwpn_prefix)
}
/**
- * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
- * @hw: pointer to hardware structure
- * @bs: the fcoe boot status
+ * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
+ * @hw: pointer to hardware structure
+ * @bs: the fcoe boot status
*
- * This function will read the FCOE boot status from the iSCSI FCOE block
+ * This function will read the FCOE boot status from the iSCSI FCOE block
**/
s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
{
}
/**
- * ixgbe_get_bus_info - Set PCI bus info
- * @hw: pointer to hardware structure
+ * ixgbe_get_bus_info - Set PCI bus info
+ * @hw: pointer to hardware structure
*
- * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
+ * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
**/
s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_num_of_tx_queues - Get Tx queues
- * @hw: pointer to hardware structure
+ * ixgbe_get_num_of_tx_queues - Get Tx queues
+ * @hw: pointer to hardware structure
*
- * Returns the number of transmit queues for the given adapter.
+ * Returns the number of transmit queues for the given adapter.
**/
u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_num_of_rx_queues - Get Rx queues
- * @hw: pointer to hardware structure
+ * ixgbe_get_num_of_rx_queues - Get Rx queues
+ * @hw: pointer to hardware structure
*
- * Returns the number of receive queues for the given adapter.
+ * Returns the number of receive queues for the given adapter.
**/
u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_stop_adapter - Disable Rx/Tx units
- * @hw: pointer to hardware structure
+ * ixgbe_stop_adapter - Disable Rx/Tx units
+ * @hw: pointer to hardware structure
*
- * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
- * disables transmit and receive units. The adapter_stopped flag is used by
- * the shared code and drivers to determine if the adapter is in a stopped
- * state and should not touch the hardware.
+ * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
+ * disables transmit and receive units. The adapter_stopped flag is used by
+ * the shared code and drivers to determine if the adapter is in a stopped
+ * state and should not touch the hardware.
**/
s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_pba_string - Reads part number string from EEPROM
- * @hw: pointer to hardware structure
- * @pba_num: stores the part number string from the EEPROM
- * @pba_num_size: part number string buffer length
+ * ixgbe_read_pba_string - Reads part number string from EEPROM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number string from the EEPROM
+ * @pba_num_size: part number string buffer length
*
- * Reads the part number string from the EEPROM.
+ * Reads the part number string from the EEPROM.
**/
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
{
}
/**
- * ixgbe_read_pba_num - Reads part number from EEPROM
- * @hw: pointer to hardware structure
- * @pba_num: stores the part number from the EEPROM
+ * ixgbe_read_pba_num - Reads part number from EEPROM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number from the EEPROM
*
- * Reads the part number from the EEPROM.
+ * Reads the part number from the EEPROM.
**/
s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
{
}
/**
- * ixgbe_identify_phy - Get PHY type
- * @hw: pointer to hardware structure
+ * ixgbe_identify_phy - Get PHY type
+ * @hw: pointer to hardware structure
*
- * Determines the physical layer module found on the current adapter.
+ * Determines the physical layer module found on the current adapter.
**/
s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_reset_phy - Perform a PHY reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_phy - Perform a PHY reset
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_phy_firmware_version -
- * @hw: pointer to hardware structure
- * @firmware_version: pointer to firmware version
+ * ixgbe_get_phy_firmware_version -
+ * @hw: pointer to hardware structure
+ * @firmware_version: pointer to firmware version
**/
s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
{
}
/**
- * ixgbe_read_phy_reg - Read PHY register
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit address of PHY register to read
- * @device_type: type of device you want to communicate with
- * @phy_data: Pointer to read data from PHY register
+ * ixgbe_read_phy_reg - Read PHY register
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit address of PHY register to read
+ * @device_type: type of device you want to communicate with
+ * @phy_data: Pointer to read data from PHY register
*
- * Reads a value from a specified PHY register
+ * Reads a value from a specified PHY register
**/
s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
u16 *phy_data)
}
/**
- * ixgbe_write_phy_reg - Write PHY register
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: type of device you want to communicate with
- * @phy_data: Data to write to the PHY register
+ * ixgbe_write_phy_reg - Write PHY register
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: type of device you want to communicate with
+ * @phy_data: Data to write to the PHY register
*
- * Writes a value to specified PHY register
+ * Writes a value to specified PHY register
**/
s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
u16 phy_data)
}
/**
- * ixgbe_setup_phy_link - Restart PHY autoneg
- * @hw: pointer to hardware structure
+ * ixgbe_setup_phy_link - Restart PHY autoneg
+ * @hw: pointer to hardware structure
*
- * Restart autonegotiation and PHY and waits for completion.
+ * Restart autonegotiation and PHY and waits for completion.
**/
s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_check_phy_link - Determine link and speed status
- * @hw: pointer to hardware structure
- * @speed: link speed
- * @link_up: true when link is up
+ * ixgbe_check_phy_link - Determine link and speed status
+ * @hw: pointer to hardware structure
+ * @speed: link speed
+ * @link_up: true when link is up
*
- * Reads a PHY register to determine if link is up and the current speed for
- * the PHY.
+ * Reads a PHY register to determine if link is up and the current speed for
+ * the PHY.
**/
s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up)
}
/**
- * ixgbe_setup_phy_link_speed - Set auto advertise
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_phy_link_speed - Set auto advertise
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Sets the auto advertised capabilities
+ * Sets the auto advertised capabilities
**/
s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_check_link - Get link and speed status
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @link_up: true when link is up
- * @link_up_wait_to_complete: bool used to wait for link up or not
+ * ixgbe_check_link - Get link and speed status
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @link_up: true when link is up
+ * @link_up_wait_to_complete: bool used to wait for link up or not
*
- * Reads the links register to determine if link is up and the current speed
+ * Reads the links register to determine if link is up and the current speed
**/
s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up, bool link_up_wait_to_complete)
}
/**
- * ixgbe_disable_tx_laser - Disable Tx laser
- * @hw: pointer to hardware structure
+ * ixgbe_disable_tx_laser - Disable Tx laser
+ * @hw: pointer to hardware structure
*
- * If the driver needs to disable the laser on SFI optics.
+ * If the driver needs to disable the laser on SFI optics.
**/
void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_tx_laser - Enable Tx laser
- * @hw: pointer to hardware structure
+ * ixgbe_enable_tx_laser - Enable Tx laser
+ * @hw: pointer to hardware structure
*
- * If the driver needs to enable the laser on SFI optics.
+ * If the driver needs to enable the laser on SFI optics.
**/
void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
- * @hw: pointer to hardware structure
+ * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
+ * @hw: pointer to hardware structure
*
- * When the driver changes the link speeds that it can support then
- * flap the tx laser to alert the link partner to start autotry
- * process on its end.
+ * When the driver changes the link speeds that it can support then
+ * flap the tx laser to alert the link partner to start autotry
+ * process on its end.
**/
void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_link - Set link speed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_link - Set link speed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Configures link settings. Restarts the link.
- * Performs autonegotiation if needed.
+ * Configures link settings. Restarts the link.
+ * Performs autonegotiation if needed.
**/
s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_setup_mac_link - Set link speed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link - Set link speed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Configures link settings. Restarts the link.
- * Performs autonegotiation if needed.
+ * Configures link settings. Restarts the link.
+ * Performs autonegotiation if needed.
**/
s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_get_link_capabilities - Returns link capabilities
- * @hw: pointer to hardware structure
- * @speed: link speed capabilities
- * @autoneg: true when autoneg or autotry is enabled
+ * ixgbe_get_link_capabilities - Returns link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: link speed capabilities
+ * @autoneg: true when autoneg or autotry is enabled
*
- * Determines the link capabilities of the current configuration.
+ * Determines the link capabilities of the current configuration.
**/
s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *autoneg)
}
/**
- * ixgbe_led_on - Turn on LEDs
- * @hw: pointer to hardware structure
- * @index: led number to turn on
+ * ixgbe_led_on - Turn on LEDs
+ * @hw: pointer to hardware structure
+ * @index: led number to turn on
*
- * Turns on the software controllable LEDs.
+ * Turns on the software controllable LEDs.
**/
s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_led_off - Turn off LEDs
- * @hw: pointer to hardware structure
- * @index: led number to turn off
+ * ixgbe_led_off - Turn off LEDs
+ * @hw: pointer to hardware structure
+ * @index: led number to turn off
*
- * Turns off the software controllable LEDs.
+ * Turns off the software controllable LEDs.
**/
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_blink_led_start - Blink LEDs
- * @hw: pointer to hardware structure
- * @index: led number to blink
+ * ixgbe_blink_led_start - Blink LEDs
+ * @hw: pointer to hardware structure
+ * @index: led number to blink
*
- * Blink LED based on index.
+ * Blink LED based on index.
**/
s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_blink_led_stop - Stop blinking LEDs
- * @hw: pointer to hardware structure
- * @index: led number to stop
+ * ixgbe_blink_led_stop - Stop blinking LEDs
+ * @hw: pointer to hardware structure
+ * @index: led number to stop
*
- * Stop blinking LED based on index.
+ * Stop blinking LED based on index.
**/
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_init_eeprom_params - Initialize EEPROM parameters
- * @hw: pointer to hardware structure
+ * ixgbe_init_eeprom_params - Initialize EEPROM parameters
+ * @hw: pointer to hardware structure
*
- * Initializes the EEPROM parameters ixgbe_eeprom_info within the
- * ixgbe_hw struct in order to set up EEPROM access.
+ * Initializes the EEPROM parameters ixgbe_eeprom_info within the
+ * ixgbe_hw struct in order to set up EEPROM access.
**/
s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
{
/**
- * ixgbe_write_eeprom - Write word to EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be written to
- * @data: 16 bit word to be written to the EEPROM
+ * ixgbe_write_eeprom - Write word to EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be written to
+ * @data: 16 bit word to be written to the EEPROM
*
- * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
- * called after this function, the EEPROM will most likely contain an
- * invalid checksum.
+ * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
+ * called after this function, the EEPROM will most likely contain an
+ * invalid checksum.
**/
s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
{
}
/**
- * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be written to
- * @data: 16 bit word(s) to be written to the EEPROM
- * @words: number of words
+ * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be written to
+ * @data: 16 bit word(s) to be written to the EEPROM
+ * @words: number of words
*
- * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
- * called after this function, the EEPROM will most likely contain an
- * invalid checksum.
+ * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
+ * called after this function, the EEPROM will most likely contain an
+ * invalid checksum.
**/
s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
u16 *data)
}
/**
- * ixgbe_read_eeprom - Read word from EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be read
- * @data: read 16 bit value from EEPROM
+ * ixgbe_read_eeprom - Read word from EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be read
+ * @data: read 16 bit value from EEPROM
*
- * Reads 16 bit value from EEPROM
+ * Reads 16 bit value from EEPROM
**/
s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
{
}
/**
- * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be read
- * @data: read 16 bit word(s) from EEPROM
- * @words: number of words
+ * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be read
+ * @data: read 16 bit word(s) from EEPROM
+ * @words: number of words
*
- * Reads 16 bit word(s) from EEPROM
+ * Reads 16 bit word(s) from EEPROM
**/
s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
- * @hw: pointer to hardware structure
- * @checksum_val: calculated checksum
+ * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
+ * @hw: pointer to hardware structure
+ * @checksum_val: calculated checksum
*
- * Performs checksum calculation and validates the EEPROM checksum
+ * Performs checksum calculation and validates the EEPROM checksum
**/
s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
{
}
/**
- * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
- * @hw: pointer to hardware structure
+ * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_insert_mac_addr - Find a RAR for this mac address
- * @hw: pointer to hardware structure
- * @addr: Address to put into receive address register
- * @vmdq: VMDq pool to assign
+ * ixgbe_insert_mac_addr - Find a RAR for this mac address
+ * @hw: pointer to hardware structure
+ * @addr: Address to put into receive address register
+ * @vmdq: VMDq pool to assign
*
- * Puts an ethernet address into a receive address register, or
- * finds the rar that it is aleady in; adds to the pool list
+ * Puts an ethernet address into a receive address register, or
+ * finds the rar that it is already in; adds to the pool list
**/
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
{
}
/**
- * ixgbe_set_rar - Set Rx address register
- * @hw: pointer to hardware structure
- * @index: Receive address register to write
- * @addr: Address to put into receive address register
- * @vmdq: VMDq "set"
- * @enable_addr: set flag that address is active
+ * ixgbe_set_rar - Set Rx address register
+ * @hw: pointer to hardware structure
+ * @index: Receive address register to write
+ * @addr: Address to put into receive address register
+ * @vmdq: VMDq "set"
+ * @enable_addr: set flag that address is active
*
- * Puts an ethernet address into a receive address register.
+ * Puts an ethernet address into a receive address register.
**/
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
u32 enable_addr)
}
/**
- * ixgbe_clear_rar - Clear Rx address register
- * @hw: pointer to hardware structure
- * @index: Receive address register to write
+ * ixgbe_clear_rar - Clear Rx address register
+ * @hw: pointer to hardware structure
+ * @index: Receive address register to write
*
- * Puts an ethernet address into a receive address register.
+ * Puts an ethernet address into a receive address register.
**/
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_set_vmdq - Associate a VMDq index with a receive address
- * @hw: pointer to hardware structure
- * @rar: receive address register index to associate with VMDq index
- * @vmdq: VMDq set or pool index
+ * ixgbe_set_vmdq - Associate a VMDq index with a receive address
+ * @hw: pointer to hardware structure
+ * @rar: receive address register index to associate with VMDq index
+ * @vmdq: VMDq set or pool index
**/
s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
- * @hw: pointer to hardware structure
- * @vmdq: VMDq default pool index
+ * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
+ * @hw: pointer to hardware structure
+ * @vmdq: VMDq default pool index
**/
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
{
}
/**
- * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
- * @hw: pointer to hardware structure
- * @rar: receive address register index to disassociate with VMDq index
- * @vmdq: VMDq set or pool index
+ * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
+ * @hw: pointer to hardware structure
+ * @rar: receive address register index to disassociate with VMDq index
+ * @vmdq: VMDq set or pool index
**/
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * ixgbe_init_rx_addrs - Initializes receive address filters.
- * @hw: pointer to hardware structure
+ * ixgbe_init_rx_addrs - Initializes receive address filters.
+ * @hw: pointer to hardware structure
*
- * Places the MAC address in receive address register 0 and clears the rest
- * of the receive address registers. Clears the multicast table. Assumes
- * the receiver is in reset when the routine is called.
+ * Places the MAC address in receive address register 0 and clears the rest
+ * of the receive address registers. Clears the multicast table. Assumes
+ * the receiver is in reset when the routine is called.
**/
s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
- * @hw: pointer to hardware structure
+ * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
+ * @hw: pointer to hardware structure
**/
u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
- * @hw: pointer to hardware structure
- * @addr_list: the list of new multicast addresses
- * @addr_count: number of addresses
- * @func: iterator function to walk the multicast address list
+ * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
+ * @hw: pointer to hardware structure
+ * @addr_list: the list of new multicast addresses
+ * @addr_count: number of addresses
+ * @func: iterator function to walk the multicast address list
*
- * The given list replaces any existing list. Clears the secondary addrs from
- * receive address registers. Uses unused receive address registers for the
- * first secondary addresses, and falls back to promiscuous mode as needed.
+ * The given list replaces any existing list. Clears the secondary addrs from
+ * receive address registers. Uses unused receive address registers for the
+ * first secondary addresses, and falls back to promiscuous mode as needed.
**/
s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
u32 addr_count, ixgbe_mc_addr_itr func)
}
/**
- * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
- * @hw: pointer to hardware structure
- * @mc_addr_list: the list of new multicast addresses
- * @mc_addr_count: number of addresses
- * @func: iterator function to walk the multicast address list
- * @clear: flag, when set clears the table beforehand
+ * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
+ * @hw: pointer to hardware structure
+ * @mc_addr_list: the list of new multicast addresses
+ * @mc_addr_count: number of addresses
+ * @func: iterator function to walk the multicast address list
+ * @clear: flag, when set clears the table beforehand
*
- * The given list replaces any existing list. Clears the MC addrs from receive
- * address registers and the multicast table. Uses unused receive address
- * registers for the first multicast addresses, and hashes the rest into the
- * multicast table.
+ * The given list replaces any existing list. Clears the MC addrs from receive
+ * address registers and the multicast table. Uses unused receive address
+ * registers for the first multicast addresses, and hashes the rest into the
+ * multicast table.
**/
s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count, ixgbe_mc_addr_itr func,
}
/**
- * ixgbe_enable_mc - Enable multicast address in RAR
- * @hw: pointer to hardware structure
+ * ixgbe_enable_mc - Enable multicast address in RAR
+ * @hw: pointer to hardware structure
*
- * Enables multicast address in RAR and the use of the multicast hash table.
+ * Enables multicast address in RAR and the use of the multicast hash table.
**/
s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_disable_mc - Disable multicast address in RAR
- * @hw: pointer to hardware structure
+ * ixgbe_disable_mc - Disable multicast address in RAR
+ * @hw: pointer to hardware structure
*
- * Disables multicast address in RAR and the use of the multicast hash table.
+ * Disables multicast address in RAR and the use of the multicast hash table.
**/
s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_clear_vfta - Clear VLAN filter table
- * @hw: pointer to hardware structure
+ * ixgbe_clear_vfta - Clear VLAN filter table
+ * @hw: pointer to hardware structure
*
- * Clears the VLAN filer table, and the VMDq index associated with the filter
+ * Clears the VLAN filer table, and the VMDq index associated with the filter
**/
s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_vfta - Set VLAN filter table
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vind: VMDq output index that maps queue to VLAN id in VLVFB
- * @vlan_on: boolean flag to turn on/off VLAN
- * @vlvf_bypass: boolean flag indicating updating the default pool is okay
+ * ixgbe_set_vfta - Set VLAN filter table
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vind: VMDq output index that maps queue to VLAN id in VLVFB
+ * @vlan_on: boolean flag to turn on/off VLAN
+ * @vlvf_bypass: boolean flag indicating updating the default pool is okay
*
- * Turn on/off specified VLAN in the VLAN filter table.
+ * Turn on/off specified VLAN in the VLAN filter table.
**/
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
bool vlvf_bypass)
}
/**
- * ixgbe_set_vlvf - Set VLAN Pool Filter
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vind: VMDq output index that maps queue to VLAN id in VLVFB
- * @vlan_on: boolean flag to turn on/off VLAN in VLVF
- * @vfta_delta: pointer to the difference between the current value of VFTA
+ * ixgbe_set_vlvf - Set VLAN Pool Filter
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vind: VMDq output index that maps queue to VLAN id in VLVFB
+ * @vlan_on: boolean flag to turn on/off VLAN in VLVF
+ * @vfta_delta: pointer to the difference between the current value of VFTA
* and the desired value
- * @vfta: the desired value of the VFTA
- * @vlvf_bypass: boolean flag indicating updating the default pool is okay
+ * @vfta: the desired value of the VFTA
+ * @vlvf_bypass: boolean flag indicating updating the default pool is okay
*
- * Turn on/off specified bit in VLVF table.
+ * Turn on/off specified bit in VLVF table.
**/
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
}
/**
- * ixgbe_fc_enable - Enable flow control
- * @hw: pointer to hardware structure
+ * ixgbe_fc_enable - Enable flow control
+ * @hw: pointer to hardware structure
*
- * Configures the flow control settings based on SW configuration.
+ * Configures the flow control settings based on SW configuration.
**/
s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_fc - Set up flow control
- * @hw: pointer to hardware structure
+ * ixgbe_setup_fc - Set up flow control
+ * @hw: pointer to hardware structure
*
- * Called at init time to set up flow control.
+ * Called at init time to set up flow control.
**/
s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
{
/**
- * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
- * @hw: pointer to hardware structure
+ * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
+ * @hw: pointer to hardware structure
*
- * Updates the temperatures in mac.thermal_sensor_data
+ * Updates the temperatures in mac.thermal_sensor_data
**/
s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
- * @hw: pointer to hardware structure
+ * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
+ * @hw: pointer to hardware structure
*
- * Inits the thermal sensor thresholds according to the NVM map
+ * Inits the thermal sensor thresholds according to the NVM map
**/
s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_config - Configure DMA Coalescing registers.
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_config - Configure DMA Coalescing registers.
+ * @hw: pointer to hardware structure
*
- * Configure DMA coalescing. If enabling dmac, dmac is activated.
- * When disabling dmac, dmac enable dmac bit is cleared.
+ * Configure DMA coalescing. If enabling dmac, dmac is activated.
+ * When disabling dmac, dmac enable dmac bit is cleared.
**/
s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
+ * @hw: pointer to hardware structure
*
- * Disables dmac, updates per TC settings, and then enable dmac.
+ * Disables dmac, updates per TC settings, and then enable dmac.
**/
s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
+ * @hw: pointer to hardware structure
*
- * Configure DMA coalescing threshold per TC and set high priority bit for
- * FCOE TC. The dmac enable bit must be cleared before configuring.
+ * Configure DMA coalescing threshold per TC and set high priority bit for
+ * FCOE TC. The dmac enable bit must be cleared before configuring.
**/
s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_eee - Enable/disable EEE support
- * @hw: pointer to the HW structure
- * @enable_eee: boolean flag to enable EEE
+ * ixgbe_setup_eee - Enable/disable EEE support
+ * @hw: pointer to the HW structure
+ * @enable_eee: boolean flag to enable EEE
*
- * Enable/disable EEE based on enable_ee flag.
- * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
- * are modified.
+ * Enable/disable EEE based on enable_ee flag.
+ * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
+ * are modified.
*
**/
s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
}
/**
- * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
- * @hw: pointer to hardware structure
- * @enable: enable or disable switch for Ethertype anti-spoofing
- * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
+ * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for Ethertype anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
*
**/
void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
}
/**
- * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit address of PHY register to read
- * @device_type: type of device you want to communicate with
- * @phy_data: Pointer to read data from PHY register
+ * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit address of PHY register to read
+ * @device_type: type of device you want to communicate with
+ * @phy_data: Pointer to read data from PHY register
*
- * Reads a value from a specified PHY register
+ * Reads a value from a specified PHY register
**/
s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 *phy_data)
}
/**
- * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: type of device you want to communicate with
- * @phy_data: Data to write to the PHY register
+ * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: type of device you want to communicate with
+ * @phy_data: Data to write to the PHY register
*
- * Writes a value to specified PHY register
+ * Writes a value to specified PHY register
**/
s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 phy_data)
}
/**
- * ixgbe_disable_mdd - Disable malicious driver detection
- * @hw: pointer to hardware structure
+ * ixgbe_disable_mdd - Disable malicious driver detection
+ * @hw: pointer to hardware structure
*
**/
void ixgbe_disable_mdd(struct ixgbe_hw *hw)
}
/**
- * ixgbe_enable_mdd - Enable malicious driver detection
- * @hw: pointer to hardware structure
+ * ixgbe_enable_mdd - Enable malicious driver detection
+ * @hw: pointer to hardware structure
*
**/
void ixgbe_enable_mdd(struct ixgbe_hw *hw)
}
/**
- * ixgbe_mdd_event - Handle malicious driver detection event
- * @hw: pointer to hardware structure
- * @vf_bitmap: vf bitmap of malicious vfs
+ * ixgbe_mdd_event - Handle malicious driver detection event
+ * @hw: pointer to hardware structure
+ * @vf_bitmap: vf bitmap of malicious vfs
*
**/
void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
}
/**
- * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
- * detection event
- * @hw: pointer to hardware structure
- * @vf: vf index
+ * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
+ * detection event
+ * @hw: pointer to hardware structure
+ * @vf: vf index
*
**/
void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
}
/**
- * ixgbe_fw_recovery_mode - Check if in FW NVM recovery mode
- * @hw: pointer to hardware structure
+ * ixgbe_fw_recovery_mode - Check if in FW NVM recovery mode
+ * @hw: pointer to hardware structure
*
**/
bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw)
}
/**
- * ixgbe_enter_lplu - Transition to low power states
- * @hw: pointer to hardware structure
+ * ixgbe_enter_lplu - Transition to low power states
+ * @hw: pointer to hardware structure
*
* Configures Low Power Link Up on transition to low power states
* (from D0 to non-D0).
}
/**
- * ixgbe_read_analog_reg8 - Reads 8 bit analog register
- * @hw: pointer to hardware structure
- * @reg: analog register to read
- * @val: read value
+ * ixgbe_read_analog_reg8 - Reads 8 bit analog register
+ * @hw: pointer to hardware structure
+ * @reg: analog register to read
+ * @val: read value
*
- * Performs write operation to analog register specified.
+ * Performs write operation to analog register specified.
**/
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
{
}
/**
- * ixgbe_write_analog_reg8 - Writes 8 bit analog register
- * @hw: pointer to hardware structure
- * @reg: analog register to write
- * @val: value to write
+ * ixgbe_write_analog_reg8 - Writes 8 bit analog register
+ * @hw: pointer to hardware structure
+ * @reg: analog register to write
+ * @val: value to write
*
- * Performs write operation to Atlas analog register specified.
+ * Performs write operation to Atlas analog register specified.
**/
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
{
}
/**
- * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
- * @hw: pointer to hardware structure
+ * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
+ * @hw: pointer to hardware structure
*
- * Initializes the Unicast Table Arrays to zero on device load. This
- * is part of the Rx init addr execution path.
+ * Initializes the Unicast Table Arrays to zero on device load. This
+ * is part of the Rx init addr execution path.
**/
s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: I2C bus address to read from
- * @data: value read
+ * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: I2C bus address to read from
+ * @data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
u8 *data)
}
/**
- * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: I2C bus address to read from
- * @data: value read
+ * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: I2C bus address to read from
+ * @data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data)
}
/**
- * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: I2C bus address to write to
- * @data: value to write
+ * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: I2C bus address to write to
+ * @data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface
- * at a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface
+ * at a specified device address.
**/
s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
u8 data)
}
/**
- * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: I2C bus address to write to
- * @data: value to write
+ * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: I2C bus address to write to
+ * @data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface
- * at a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface
+ * at a specified device address.
**/
s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data)
}
/**
- * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
- * @hw: pointer to hardware structure
- * @byte_offset: EEPROM byte offset to write
- * @eeprom_data: value to write
+ * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
+ * @hw: pointer to hardware structure
+ * @byte_offset: EEPROM byte offset to write
+ * @eeprom_data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
u8 byte_offset, u8 eeprom_data)
}
/**
- * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
- * @hw: pointer to hardware structure
- * @byte_offset: EEPROM byte offset to read
- * @eeprom_data: value read
+ * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
+ * @hw: pointer to hardware structure
+ * @byte_offset: EEPROM byte offset to read
+ * @eeprom_data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
{
}
/**
- * ixgbe_get_supported_physical_layer - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_physical_layer - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current configuration.
+ * Determines physical layer capabilities of the current configuration.
**/
u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
- * @hw: pointer to hardware structure
- * @regval: bitfield to write to the Rx DMA register
+ * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
+ * @hw: pointer to hardware structure
+ * @regval: bitfield to write to the Rx DMA register
*
- * Enables the Rx DMA unit of the device.
+ * Enables the Rx DMA unit of the device.
**/
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
{
}
/**
- * ixgbe_disable_sec_rx_path - Stops the receive data path
- * @hw: pointer to hardware structure
+ * ixgbe_disable_sec_rx_path - Stops the receive data path
+ * @hw: pointer to hardware structure
*
- * Stops the receive data path.
+ * Stops the receive data path.
**/
s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_sec_rx_path - Enables the receive data path
- * @hw: pointer to hardware structure
+ * ixgbe_enable_sec_rx_path - Enables the receive data path
+ * @hw: pointer to hardware structure
*
- * Enables the receive data path.
+ * Enables the receive data path.
**/
s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to acquire
+ * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
*
- * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
- * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_release_swfw_semaphore - Release SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to release
+ * ixgbe_release_swfw_semaphore - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
*
- * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
- * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/
void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
+ * @hw: pointer to hardware structure
*
- * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
- * Regardless of whether is succeeds or not it then release the semaphore.
- * This is function is called to recover from catastrophic failures that
- * may have left the semaphore locked.
+ * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
+ * Regardless of whether is succeeds or not it then release the semaphore.
+ * This is function is called to recover from catastrophic failures that
+ * may have left the semaphore locked.
**/
void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_rate_select_speed - Set module link speed
- * @hw: pointer to hardware structure
- * @speed: link speed to set
+ * ixgbe_set_rate_select_speed - Set module link speed
+ * @hw: pointer to hardware structure
+ * @speed: link speed to set
*
- * Set module link speed via the rate select.
+ * Set module link speed via the rate select.
*/
void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
{
u16 offset);
/**
- * ixgbe_init_ops_generic - Inits function ptrs
- * @hw: pointer to the hardware structure
+ * ixgbe_init_ops_generic - Inits function ptrs
+ * @hw: pointer to the hardware structure
*
- * Initialize the function pointers.
+ * Initialize the function pointers.
**/
s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_fc_generic - Set up flow control
- * @hw: pointer to hardware structure
+ * ixgbe_setup_fc_generic - Set up flow control
+ * @hw: pointer to hardware structure
*
- * Called at init time to set up flow control.
+ * Called at init time to set up flow control.
**/
s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware by filling the bus info structure and media type, clears
- * all on chip counters, initializes receive address registers, multicast
- * table, VLAN filter table, calls routine to set up link and flow control
- * settings, and leaves transmit and receive units disabled and uninitialized
+ * Starts the hardware by filling the bus info structure and media type, clears
+ * all on chip counters, initializes receive address registers, multicast
+ * table, VLAN filter table, calls routine to set up link and flow control
+ * settings, and leaves transmit and receive units disabled and uninitialized
**/
s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_hw_gen2 - Init sequence for common device family
- * @hw: pointer to hw structure
+ * ixgbe_start_hw_gen2 - Init sequence for common device family
+ * @hw: pointer to hw structure
*
* Performs the init sequence common to the second generation
* of 10 GbE devices.
* Devices in the second generation:
- * 82599
- * X540
+ * 82599
+ * X540
**/
s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_hw_generic - Generic hardware initialization
- * @hw: pointer to hardware structure
+ * ixgbe_init_hw_generic - Generic hardware initialization
+ * @hw: pointer to hardware structure
*
- * Initialize the hardware by resetting the hardware, filling the bus info
- * structure and media type, clears all on chip counters, initializes receive
- * address registers, multicast table, VLAN filter table, calls routine to set
- * up link and flow control settings, and leaves transmit and receive units
- * disabled and uninitialized
+ * Initialize the hardware by resetting the hardware, filling the bus info
+ * structure and media type, clears all on chip counters, initializes receive
+ * address registers, multicast table, VLAN filter table, calls routine to set
+ * up link and flow control settings, and leaves transmit and receive units
+ * disabled and uninitialized
**/
s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
- * @hw: pointer to hardware structure
+ * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
+ * @hw: pointer to hardware structure
*
- * Clears all hardware statistics counters by reading them from the hardware
- * Statistics counters are clear on read.
+ * Clears all hardware statistics counters by reading them from the hardware
+ * Statistics counters are clear on read.
**/
s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
- * @hw: pointer to hardware structure
- * @pba_num: stores the part number string from the EEPROM
- * @pba_num_size: part number string buffer length
+ * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number string from the EEPROM
+ * @pba_num_size: part number string buffer length
*
- * Reads the part number string from the EEPROM.
+ * Reads the part number string from the EEPROM.
**/
s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
u32 pba_num_size)
}
/**
- * ixgbe_read_pba_num_generic - Reads part number from EEPROM
- * @hw: pointer to hardware structure
- * @pba_num: stores the part number from the EEPROM
+ * ixgbe_read_pba_num_generic - Reads part number from EEPROM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number from the EEPROM
*
- * Reads the part number from the EEPROM.
+ * Reads the part number from the EEPROM.
**/
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)
{
}
/**
- * ixgbe_read_pba_raw
- * @hw: pointer to the HW structure
- * @eeprom_buf: optional pointer to EEPROM image
- * @eeprom_buf_size: size of EEPROM image in words
- * @max_pba_block_size: PBA block size limit
- * @pba: pointer to output PBA structure
+ * ixgbe_read_pba_raw
+ * @hw: pointer to the HW structure
+ * @eeprom_buf: optional pointer to EEPROM image
+ * @eeprom_buf_size: size of EEPROM image in words
+ * @max_pba_block_size: PBA block size limit
+ * @pba: pointer to output PBA structure
*
- * Reads PBA from EEPROM image when eeprom_buf is not NULL.
- * Reads PBA from physical EEPROM device when eeprom_buf is NULL.
+ * Reads PBA from EEPROM image when eeprom_buf is not NULL.
+ * Reads PBA from physical EEPROM device when eeprom_buf is NULL.
*
**/
s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
}
/**
- * ixgbe_write_pba_raw
- * @hw: pointer to the HW structure
- * @eeprom_buf: optional pointer to EEPROM image
- * @eeprom_buf_size: size of EEPROM image in words
- * @pba: pointer to PBA structure
+ * ixgbe_write_pba_raw
+ * @hw: pointer to the HW structure
+ * @eeprom_buf: optional pointer to EEPROM image
+ * @eeprom_buf_size: size of EEPROM image in words
+ * @pba: pointer to PBA structure
*
- * Writes PBA to EEPROM image when eeprom_buf is not NULL.
- * Writes PBA to physical EEPROM device when eeprom_buf is NULL.
+ * Writes PBA to EEPROM image when eeprom_buf is not NULL.
+ * Writes PBA to physical EEPROM device when eeprom_buf is NULL.
*
**/
s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
}
/**
- * ixgbe_get_pba_block_size
- * @hw: pointer to the HW structure
- * @eeprom_buf: optional pointer to EEPROM image
- * @eeprom_buf_size: size of EEPROM image in words
- * @pba_data_size: pointer to output variable
+ * ixgbe_get_pba_block_size
+ * @hw: pointer to the HW structure
+ * @eeprom_buf: optional pointer to EEPROM image
+ * @eeprom_buf_size: size of EEPROM image in words
+ * @pba_data_size: pointer to output variable
*
- * Returns the size of the PBA block in words. Function operates on EEPROM
- * image if the eeprom_buf pointer is not NULL otherwise it accesses physical
- * EEPROM device.
+ * Returns the size of the PBA block in words. Function operates on EEPROM
+ * image if the eeprom_buf pointer is not NULL otherwise it accesses physical
+ * EEPROM device.
*
**/
s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
}
/**
- * ixgbe_get_mac_addr_generic - Generic get MAC address
- * @hw: pointer to hardware structure
- * @mac_addr: Adapter MAC address
+ * ixgbe_get_mac_addr_generic - Generic get MAC address
+ * @hw: pointer to hardware structure
+ * @mac_addr: Adapter MAC address
*
- * Reads the adapter's MAC address from first Receive Address Register (RAR0)
- * A reset of the adapter must be performed prior to calling this function
- * in order for the MAC address to have been loaded from the EEPROM into RAR0
+ * Reads the adapter's MAC address from first Receive Address Register (RAR0)
+ * A reset of the adapter must be performed prior to calling this function
+ * in order for the MAC address to have been loaded from the EEPROM into RAR0
**/
s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr)
{
}
/**
- * ixgbe_set_pci_config_data_generic - Generic store PCI bus info
- * @hw: pointer to hardware structure
- * @link_status: the link status returned by the PCI config space
+ * ixgbe_set_pci_config_data_generic - Generic store PCI bus info
+ * @hw: pointer to hardware structure
+ * @link_status: the link status returned by the PCI config space
*
- * Stores the PCI bus info (speed, width, type) within the ixgbe_hw structure
+ * Stores the PCI bus info (speed, width, type) within the ixgbe_hw structure
**/
void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status)
{
}
/**
- * ixgbe_get_bus_info_generic - Generic set PCI bus info
- * @hw: pointer to hardware structure
+ * ixgbe_get_bus_info_generic - Generic set PCI bus info
+ * @hw: pointer to hardware structure
*
- * Gets the PCI bus info (speed, width, type) then calls helper function to
- * store this data within the ixgbe_hw structure.
+ * Gets the PCI bus info (speed, width, type) then calls helper function to
+ * store this data within the ixgbe_hw structure.
**/
s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
- * @hw: pointer to the HW structure
+ * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
+ * @hw: pointer to the HW structure
*
- * Determines the LAN function id by reading memory-mapped registers and swaps
- * the port value if requested, and set MAC instance for devices that share
- * CS4227.
+ * Determines the LAN function id by reading memory-mapped registers and swaps
+ * the port value if requested, and set MAC instance for devices that share
+ * CS4227.
**/
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
- * @hw: pointer to hardware structure
+ * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
+ * @hw: pointer to hardware structure
*
- * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
- * disables transmit and receive units. The adapter_stopped flag is used by
- * the shared code and drivers to determine if the adapter is in a stopped
- * state and should not touch the hardware.
+ * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
+ * disables transmit and receive units. The adapter_stopped flag is used by
+ * the shared code and drivers to determine if the adapter is in a stopped
+ * state and should not touch the hardware.
**/
s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
- * @hw: pointer to hardware structure
+ * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
+ * @hw: pointer to hardware structure
*
- * Store the index for the link active LED. This will be used to support
- * blinking the LED.
+ * Store the index for the link active LED. This will be used to support
+ * blinking the LED.
**/
s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_led_on_generic - Turns on the software controllable LEDs.
- * @hw: pointer to hardware structure
- * @index: led number to turn on
+ * ixgbe_led_on_generic - Turns on the software controllable LEDs.
+ * @hw: pointer to hardware structure
+ * @index: led number to turn on
**/
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_led_off_generic - Turns off the software controllable LEDs.
- * @hw: pointer to hardware structure
- * @index: led number to turn off
+ * ixgbe_led_off_generic - Turns off the software controllable LEDs.
+ * @hw: pointer to hardware structure
+ * @index: led number to turn off
**/
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
- * @hw: pointer to hardware structure
+ * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
+ * @hw: pointer to hardware structure
*
- * Initializes the EEPROM parameters ixgbe_eeprom_info within the
- * ixgbe_hw struct in order to set up EEPROM access.
+ * Initializes the EEPROM parameters ixgbe_eeprom_info within the
+ * ixgbe_hw struct in order to set up EEPROM access.
**/
s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to write
- * @words: number of word(s)
- * @data: 16 bit word(s) to write to EEPROM
+ * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to write
+ * @words: number of word(s)
+ * @data: 16 bit word(s) to write to EEPROM
*
- * Reads 16 bit word(s) from EEPROM through bit-bang method
+ * Reads 16 bit word(s) from EEPROM through bit-bang method
**/
s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be written to
- * @words: number of word(s)
- * @data: 16 bit word(s) to be written to the EEPROM
+ * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be written to
+ * @words: number of word(s)
+ * @data: 16 bit word(s) to be written to the EEPROM
*
- * If ixgbe_eeprom_update_checksum is not called after this function, the
- * EEPROM will most likely contain an invalid checksum.
+ * If ixgbe_eeprom_update_checksum is not called after this function, the
+ * EEPROM will most likely contain an invalid checksum.
**/
STATIC s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be written to
- * @data: 16 bit word to be written to the EEPROM
+ * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be written to
+ * @data: 16 bit word to be written to the EEPROM
*
- * If ixgbe_eeprom_update_checksum is not called after this function, the
- * EEPROM will most likely contain an invalid checksum.
+ * If ixgbe_eeprom_update_checksum is not called after this function, the
+ * EEPROM will most likely contain an invalid checksum.
**/
s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data)
{
}
/**
- * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be read
- * @data: read 16 bit words(s) from EEPROM
- * @words: number of word(s)
+ * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be read
+ * @data: read 16 bit words(s) from EEPROM
+ * @words: number of word(s)
*
- * Reads 16 bit word(s) from EEPROM through bit-bang method
+ * Reads 16 bit word(s) from EEPROM through bit-bang method
**/
s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be read
- * @words: number of word(s)
- * @data: read 16 bit word(s) from EEPROM
+ * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be read
+ * @words: number of word(s)
+ * @data: read 16 bit word(s) from EEPROM
*
- * Reads 16 bit word(s) from EEPROM through bit-bang method
+ * Reads 16 bit word(s) from EEPROM through bit-bang method
**/
STATIC s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be read
- * @data: read 16 bit value from EEPROM
+ * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be read
+ * @data: read 16 bit value from EEPROM
*
- * Reads 16 bit value from EEPROM through bit-bang method
+ * Reads 16 bit value from EEPROM through bit-bang method
**/
s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 *data)
}
/**
- * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @words: number of word(s)
- * @data: 16 bit word(s) from the EEPROM
+ * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @words: number of word(s)
+ * @data: 16 bit word(s) from the EEPROM
*
- * Reads a 16 bit word(s) from the EEPROM using the EERD register.
+ * Reads a 16 bit word(s) from the EEPROM using the EERD register.
**/
s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
- * @hw: pointer to hardware structure
- * @offset: offset within the EEPROM to be used as a scratch pad
+ * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
+ * @hw: pointer to hardware structure
+ * @offset: offset within the EEPROM to be used as a scratch pad
*
- * Discover EEPROM page size by writing marching data at given offset.
- * This function is called only when we are writing a new large buffer
- * at given offset so the data would be overwritten anyway.
+ * Discover EEPROM page size by writing marching data at given offset.
+ * This function is called only when we are writing a new large buffer
+ * at given offset so the data would be overwritten anyway.
**/
STATIC s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,
u16 offset)
}
/**
- * ixgbe_read_eerd_generic - Read EEPROM word using EERD
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @data: word read from the EEPROM
+ * ixgbe_read_eerd_generic - Read EEPROM word using EERD
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @data: word read from the EEPROM
*
- * Reads a 16 bit word from the EEPROM using the EERD register.
+ * Reads a 16 bit word from the EEPROM using the EERD register.
**/
s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data)
{
}
/**
- * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @words: number of word(s)
- * @data: word(s) write to the EEPROM
+ * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @words: number of word(s)
+ * @data: word(s) write to the EEPROM
*
- * Write a 16 bit word(s) to the EEPROM using the EEWR register.
+ * Write a 16 bit word(s) to the EEPROM using the EEWR register.
**/
s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data)
}
/**
- * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @data: word write to the EEPROM
+ * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @data: word write to the EEPROM
*
- * Write a 16 bit word to the EEPROM using the EEWR register.
+ * Write a 16 bit word to the EEPROM using the EEWR register.
**/
s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data)
{
}
/**
- * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
- * @hw: pointer to hardware structure
- * @ee_reg: EEPROM flag for polling
+ * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
+ * @hw: pointer to hardware structure
+ * @ee_reg: EEPROM flag for polling
*
- * Polls the status bit (bit 1) of the EERD or EEWR to determine when the
- * read or write is done respectively.
+ * Polls the status bit (bit 1) of the EERD or EEWR to determine when the
+ * read or write is done respectively.
**/
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
{
}
/**
- * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
- * @hw: pointer to hardware structure
+ * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
+ * @hw: pointer to hardware structure
*
- * Prepares EEPROM for access using bit-bang method. This function should
- * be called before issuing a command to the EEPROM.
+ * Prepares EEPROM for access using bit-bang method. This function should
+ * be called before issuing a command to the EEPROM.
**/
STATIC s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_eeprom_semaphore - Get hardware semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_get_eeprom_semaphore - Get hardware semaphore
+ * @hw: pointer to hardware structure
*
- * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
+ * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
**/
STATIC s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_release_eeprom_semaphore - Release hardware semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_release_eeprom_semaphore - Release hardware semaphore
+ * @hw: pointer to hardware structure
*
- * This function clears hardware semaphore bits.
+ * This function clears hardware semaphore bits.
**/
STATIC void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_ready_eeprom - Polls for EEPROM ready
- * @hw: pointer to hardware structure
+ * ixgbe_ready_eeprom - Polls for EEPROM ready
+ * @hw: pointer to hardware structure
**/
STATIC s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
- * @hw: pointer to hardware structure
+ * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
+ * @hw: pointer to hardware structure
**/
STATIC void ixgbe_standby_eeprom(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
- * @hw: pointer to hardware structure
- * @data: data to send to the EEPROM
- * @count: number of bits to shift out
+ * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
+ * @hw: pointer to hardware structure
+ * @data: data to send to the EEPROM
+ * @count: number of bits to shift out
**/
STATIC void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
u16 count)
}
/**
- * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
- * @hw: pointer to hardware structure
- * @count: number of bits to shift
+ * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
+ * @hw: pointer to hardware structure
+ * @count: number of bits to shift
**/
STATIC u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count)
{
}
/**
- * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
- * @hw: pointer to hardware structure
- * @eec: EEC register's current value
+ * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
+ * @hw: pointer to hardware structure
+ * @eec: EEC register's current value
**/
STATIC void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
{
}
/**
- * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
- * @hw: pointer to hardware structure
- * @eec: EEC's current value
+ * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
+ * @hw: pointer to hardware structure
+ * @eec: EEC's current value
**/
STATIC void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
{
}
/**
- * ixgbe_release_eeprom - Release EEPROM, release semaphores
- * @hw: pointer to hardware structure
+ * ixgbe_release_eeprom - Release EEPROM, release semaphores
+ * @hw: pointer to hardware structure
**/
STATIC void ixgbe_release_eeprom(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
- * @hw: pointer to hardware structure
+ * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
+ * @hw: pointer to hardware structure
*
- * Returns a negative error code on error, or the 16-bit checksum
+ * Returns a negative error code on error, or the 16-bit checksum
**/
s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
- * @hw: pointer to hardware structure
- * @checksum_val: calculated checksum
+ * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
+ * @hw: pointer to hardware structure
+ * @checksum_val: calculated checksum
*
- * Performs checksum calculation and validates the EEPROM checksum. If the
- * caller does not need checksum_val, the value can be NULL.
+ * Performs checksum calculation and validates the EEPROM checksum. If the
+ * caller does not need checksum_val, the value can be NULL.
**/
s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
u16 *checksum_val)
}
/**
- * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
- * @hw: pointer to hardware structure
+ * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_validate_mac_addr - Validate MAC address
- * @mac_addr: pointer to MAC address.
+ * ixgbe_validate_mac_addr - Validate MAC address
+ * @mac_addr: pointer to MAC address.
*
- * Tests a MAC address to ensure it is a valid Individual Address.
+ * Tests a MAC address to ensure it is a valid Individual Address.
**/
s32 ixgbe_validate_mac_addr(u8 *mac_addr)
{
}
/**
- * ixgbe_set_rar_generic - Set Rx address register
- * @hw: pointer to hardware structure
- * @index: Receive address register to write
- * @addr: Address to put into receive address register
- * @vmdq: VMDq "set" or "pool" index
- * @enable_addr: set flag that address is active
+ * ixgbe_set_rar_generic - Set Rx address register
+ * @hw: pointer to hardware structure
+ * @index: Receive address register to write
+ * @addr: Address to put into receive address register
+ * @vmdq: VMDq "set" or "pool" index
+ * @enable_addr: set flag that address is active
*
- * Puts an ethernet address into a receive address register.
+ * Puts an ethernet address into a receive address register.
**/
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
u32 enable_addr)
}
/**
- * ixgbe_clear_rar_generic - Remove Rx address register
- * @hw: pointer to hardware structure
- * @index: Receive address register to write
+ * ixgbe_clear_rar_generic - Remove Rx address register
+ * @hw: pointer to hardware structure
+ * @index: Receive address register to write
*
- * Clears an ethernet address from a receive address register.
+ * Clears an ethernet address from a receive address register.
**/
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
- * @hw: pointer to hardware structure
+ * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
+ * @hw: pointer to hardware structure
*
- * Places the MAC address in receive address register 0 and clears the rest
- * of the receive address registers. Clears the multicast table. Assumes
- * the receiver is in reset when the routine is called.
+ * Places the MAC address in receive address register 0 and clears the rest
+ * of the receive address registers. Clears the multicast table. Assumes
+ * the receiver is in reset when the routine is called.
**/
s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_add_uc_addr - Adds a secondary unicast address.
- * @hw: pointer to hardware structure
- * @addr: new address
- * @vmdq: VMDq "set" or "pool" index
+ * ixgbe_add_uc_addr - Adds a secondary unicast address.
+ * @hw: pointer to hardware structure
+ * @addr: new address
+ * @vmdq: VMDq "set" or "pool" index
*
- * Adds it to unused receive address register or goes into promiscuous mode.
+ * Adds it to unused receive address register or goes into promiscuous mode.
**/
void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
{
}
/**
- * ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses
- * @hw: pointer to hardware structure
- * @addr_list: the list of new addresses
- * @addr_count: number of addresses
- * @next: iterator function to walk the address list
+ * ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses
+ * @hw: pointer to hardware structure
+ * @addr_list: the list of new addresses
+ * @addr_count: number of addresses
+ * @next: iterator function to walk the address list
*
- * The given list replaces any existing list. Clears the secondary addrs from
- * receive address registers. Uses unused receive address registers for the
- * first secondary addresses, and falls back to promiscuous mode as needed.
+ * The given list replaces any existing list. Clears the secondary addrs from
+ * receive address registers. Uses unused receive address registers for the
+ * first secondary addresses, and falls back to promiscuous mode as needed.
*
- * Drivers using secondary unicast addresses must set user_set_promisc when
- * manually putting the device into promiscuous mode.
+ * Drivers using secondary unicast addresses must set user_set_promisc when
+ * manually putting the device into promiscuous mode.
**/
s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
u32 addr_count, ixgbe_mc_addr_itr next)
}
/**
- * ixgbe_mta_vector - Determines bit-vector in multicast table to set
- * @hw: pointer to hardware structure
- * @mc_addr: the multicast address
+ * ixgbe_mta_vector - Determines bit-vector in multicast table to set
+ * @hw: pointer to hardware structure
+ * @mc_addr: the multicast address
*
- * Extracts the 12 bits, from a multicast address, to determine which
- * bit-vector to set in the multicast table. The hardware uses 12 bits, from
- * incoming rx multicast addresses, to determine the bit-vector to check in
- * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
- * by the MO field of the MCSTCTRL. The MO field is set during initialization
- * to mc_filter_type.
+ * Extracts the 12 bits, from a multicast address, to determine which
+ * bit-vector to set in the multicast table. The hardware uses 12 bits, from
+ * incoming rx multicast addresses, to determine the bit-vector to check in
+ * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
+ * by the MO field of the MCSTCTRL. The MO field is set during initialization
+ * to mc_filter_type.
**/
STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
{
}
/**
- * ixgbe_set_mta - Set bit-vector in multicast table
- * @hw: pointer to hardware structure
- * @mc_addr: Multicast address
+ * ixgbe_set_mta - Set bit-vector in multicast table
+ * @hw: pointer to hardware structure
+ * @mc_addr: Multicast address
*
- * Sets the bit-vector in the multicast table.
+ * Sets the bit-vector in the multicast table.
**/
void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr)
{
}
/**
- * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
- * @hw: pointer to hardware structure
- * @mc_addr_list: the list of new multicast addresses
- * @mc_addr_count: number of addresses
- * @next: iterator function to walk the multicast address list
- * @clear: flag, when set clears the table beforehand
+ * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
+ * @hw: pointer to hardware structure
+ * @mc_addr_list: the list of new multicast addresses
+ * @mc_addr_count: number of addresses
+ * @next: iterator function to walk the multicast address list
+ * @clear: flag, when set clears the table beforehand
*
- * When the clear flag is set, the given list replaces any existing list.
- * Hashes the given addresses into the multicast table.
+ * When the clear flag is set, the given list replaces any existing list.
+ * Hashes the given addresses into the multicast table.
**/
s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count, ixgbe_mc_addr_itr next,
}
/**
- * ixgbe_enable_mc_generic - Enable multicast address in RAR
- * @hw: pointer to hardware structure
+ * ixgbe_enable_mc_generic - Enable multicast address in RAR
+ * @hw: pointer to hardware structure
*
- * Enables multicast address in RAR and the use of the multicast hash table.
+ * Enables multicast address in RAR and the use of the multicast hash table.
**/
s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_disable_mc_generic - Disable multicast address in RAR
- * @hw: pointer to hardware structure
+ * ixgbe_disable_mc_generic - Disable multicast address in RAR
+ * @hw: pointer to hardware structure
*
- * Disables multicast address in RAR and the use of the multicast hash table.
+ * Disables multicast address in RAR and the use of the multicast hash table.
**/
s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_enable_generic - Enable flow control
- * @hw: pointer to hardware structure
+ * ixgbe_fc_enable_generic - Enable flow control
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to the current settings.
+ * Enable flow control according to the current settings.
**/
s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_negotiate_fc - Negotiate flow control
- * @hw: pointer to hardware structure
- * @adv_reg: flow control advertised settings
- * @lp_reg: link partner's flow control settings
- * @adv_sym: symmetric pause bit in advertisement
- * @adv_asm: asymmetric pause bit in advertisement
- * @lp_sym: symmetric pause bit in link partner advertisement
- * @lp_asm: asymmetric pause bit in link partner advertisement
+ * ixgbe_negotiate_fc - Negotiate flow control
+ * @hw: pointer to hardware structure
+ * @adv_reg: flow control advertised settings
+ * @lp_reg: link partner's flow control settings
+ * @adv_sym: symmetric pause bit in advertisement
+ * @adv_asm: asymmetric pause bit in advertisement
+ * @lp_sym: symmetric pause bit in link partner advertisement
+ * @lp_asm: asymmetric pause bit in link partner advertisement
*
- * Find the intersection between advertised settings and link partner's
- * advertised settings
+ * Find the intersection between advertised settings and link partner's
+ * advertised settings
**/
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
}
/**
- * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
+ * @hw: pointer to hardware structure
*
- * Enable flow control according on 1 gig fiber.
+ * Enable flow control according on 1 gig fiber.
**/
STATIC s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to IEEE clause 37.
+ * Enable flow control according to IEEE clause 37.
**/
STATIC s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to IEEE clause 37.
+ * Enable flow control according to IEEE clause 37.
**/
STATIC s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_autoneg - Configure flow control
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg - Configure flow control
+ * @hw: pointer to hardware structure
*
- * Compares our advertised flow control capabilities to those advertised by
- * our link partner, and determines the proper flow control mode to use.
+ * Compares our advertised flow control capabilities to those advertised by
+ * our link partner, and determines the proper flow control mode to use.
**/
void ixgbe_fc_autoneg(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_disable_pcie_master - Disable PCI-express master access
- * @hw: pointer to hardware structure
+ * ixgbe_disable_pcie_master - Disable PCI-express master access
+ * @hw: pointer to hardware structure
*
- * Disables PCI-Express master access and verifies there are no pending
- * requests. IXGBE_ERR_MASTER_REQUESTS_PENDING is returned if master disable
- * bit hasn't caused the master requests to be disabled, else IXGBE_SUCCESS
- * is returned signifying master requests disabled.
+ * Disables PCI-Express master access and verifies there are no pending
+ * requests. IXGBE_ERR_MASTER_REQUESTS_PENDING is returned if master disable
+ * bit hasn't caused the master requests to be disabled, else IXGBE_SUCCESS
+ * is returned signifying master requests disabled.
**/
s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to acquire
+ * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
*
- * Acquires the SWFW semaphore through the GSSR register for the specified
- * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ * Acquires the SWFW semaphore through the GSSR register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_release_swfw_sync - Release SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to release
+ * ixgbe_release_swfw_sync - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
*
- * Releases the SWFW semaphore through the GSSR register for the specified
- * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ * Releases the SWFW semaphore through the GSSR register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
**/
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_disable_sec_rx_path_generic - Stops the receive data path
- * @hw: pointer to hardware structure
+ * ixgbe_disable_sec_rx_path_generic - Stops the receive data path
+ * @hw: pointer to hardware structure
*
- * Stops the receive data path and waits for the HW to internally empty
- * the Rx security block
+ * Stops the receive data path and waits for the HW to internally empty
+ * the Rx security block
**/
s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw)
{
}
/**
- * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
- * @hw: pointer to hardware structure
- * @locked: bool to indicate whether the SW/FW lock was taken
- * @reg_val: Value we read from AUTOC
+ * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
+ * @hw: pointer to hardware structure
+ * @locked: bool to indicate whether the SW/FW lock was taken
+ * @reg_val: Value we read from AUTOC
*
- * The default case requires no protection so just to the register read.
+ * The default case requires no protection so just to the register read.
*/
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
{
* @hw: pointer to hardware structure
* @reg_val: value to write to AUTOC
* @locked: bool to indicate whether the SW/FW lock was already taken by
- * previous read.
+ * previous read.
*
* The default case requires no protection so just to the register write.
*/
}
/**
- * ixgbe_enable_sec_rx_path_generic - Enables the receive data path
- * @hw: pointer to hardware structure
+ * ixgbe_enable_sec_rx_path_generic - Enables the receive data path
+ * @hw: pointer to hardware structure
*
- * Enables the receive data path.
+ * Enables the receive data path.
**/
s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
- * @hw: pointer to hardware structure
- * @regval: register value to write to RXCTRL
+ * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
+ * @hw: pointer to hardware structure
+ * @regval: register value to write to RXCTRL
*
- * Enables the Rx DMA unit
+ * Enables the Rx DMA unit
**/
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)
{
}
/**
- * ixgbe_blink_led_start_generic - Blink LED based on index.
- * @hw: pointer to hardware structure
- * @index: led number to blink
+ * ixgbe_blink_led_start_generic - Blink LED based on index.
+ * @hw: pointer to hardware structure
+ * @index: led number to blink
**/
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
- * @hw: pointer to hardware structure
- * @index: led number to stop blinking
+ * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
+ * @hw: pointer to hardware structure
+ * @index: led number to stop blinking
**/
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
{
}
/**
- * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
- * @hw: pointer to hardware structure
- * @san_mac_offset: SAN MAC address offset
+ * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
+ * @hw: pointer to hardware structure
+ * @san_mac_offset: SAN MAC address offset
*
- * This function will read the EEPROM location for the SAN MAC address
- * pointer, and returns the value at that location. This is used in both
- * get and set mac_addr routines.
+ * This function will read the EEPROM location for the SAN MAC address
+ * pointer, and returns the value at that location. This is used in both
+ * get and set mac_addr routines.
**/
STATIC s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw,
u16 *san_mac_offset)
}
/**
- * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
- * @hw: pointer to hardware structure
- * @san_mac_addr: SAN MAC address
+ * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
+ * @hw: pointer to hardware structure
+ * @san_mac_addr: SAN MAC address
*
- * Reads the SAN MAC address from the EEPROM, if it's available. This is
- * per-port, so set_lan_id() must be called before reading the addresses.
- * set_lan_id() is called by identify_sfp(), but this cannot be relied
- * upon for non-SFP connections, so we must call it here.
+ * Reads the SAN MAC address from the EEPROM, if it's available. This is
+ * per-port, so set_lan_id() must be called before reading the addresses.
+ * set_lan_id() is called by identify_sfp(), but this cannot be relied
+ * upon for non-SFP connections, so we must call it here.
**/
s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
}
/**
- * ixgbe_set_san_mac_addr_generic - Write the SAN MAC address to the EEPROM
- * @hw: pointer to hardware structure
- * @san_mac_addr: SAN MAC address
+ * ixgbe_set_san_mac_addr_generic - Write the SAN MAC address to the EEPROM
+ * @hw: pointer to hardware structure
+ * @san_mac_addr: SAN MAC address
*
- * Write a SAN MAC address to the EEPROM.
+ * Write a SAN MAC address to the EEPROM.
**/
s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
}
/**
- * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
- * @hw: pointer to hardware structure
+ * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
+ * @hw: pointer to hardware structure
*
- * Read PCIe configuration space, and get the MSI-X vector count from
- * the capabilities table.
+ * Read PCIe configuration space, and get the MSI-X vector count from
+ * the capabilities table.
**/
u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_insert_mac_addr_generic - Find a RAR for this mac address
- * @hw: pointer to hardware structure
- * @addr: Address to put into receive address register
- * @vmdq: VMDq pool to assign
+ * ixgbe_insert_mac_addr_generic - Find a RAR for this mac address
+ * @hw: pointer to hardware structure
+ * @addr: Address to put into receive address register
+ * @vmdq: VMDq pool to assign
*
- * Puts an ethernet address into a receive address register, or
- * finds the rar that it is aleady in; adds to the pool list
+ * Puts an ethernet address into a receive address register, or
+ * finds the rar that it is already in; adds to the pool list
**/
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
{
}
/**
- * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
- * @hw: pointer to hardware struct
- * @rar: receive address register index to disassociate
- * @vmdq: VMDq pool index to remove from the rar
+ * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
+ * @hw: pointer to hardware struct
+ * @rar: receive address register index to disassociate
+ * @vmdq: VMDq pool index to remove from the rar
**/
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
- * @hw: pointer to hardware struct
- * @rar: receive address register index to associate with a VMDq index
- * @vmdq: VMDq pool index
+ * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
+ * @hw: pointer to hardware struct
+ * @rar: receive address register index to associate with a VMDq index
+ * @vmdq: VMDq pool index
**/
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
}
/**
- * This function should only be involved in the IOV mode.
- * In IOV mode, Default pool is next pool after the number of
- * VFs advertized and not 0.
- * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
+ * This function should only be involved in the IOV mode.
+ * In IOV mode, Default pool is next pool after the number of
+ * VFs advertized and not 0.
+ * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
*
- * ixgbe_set_vmdq_san_mac - Associate default VMDq pool index with a rx address
- * @hw: pointer to hardware struct
- * @vmdq: VMDq pool index
+ * ixgbe_set_vmdq_san_mac - Associate default VMDq pool index with a rx address
+ * @hw: pointer to hardware struct
+ * @vmdq: VMDq pool index
**/
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)
{
}
/**
- * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
- * @hw: pointer to hardware structure
+ * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vlvf_bypass: true to find vlanid only, false returns first empty slot if
+ * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vlvf_bypass: true to find vlanid only, false returns first empty slot if
* vlanid not found
*
*
- * return the VLVF index where this VLAN id should be placed
+ * return the VLVF index where this VLAN id should be placed
*
**/
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass)
}
/**
- * ixgbe_set_vfta_generic - Set VLAN filter table
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vind: VMDq output index that maps queue to VLAN id in VLVFB
- * @vlan_on: boolean flag to turn on/off VLAN
- * @vlvf_bypass: boolean flag indicating updating default pool is okay
+ * ixgbe_set_vfta_generic - Set VLAN filter table
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vind: VMDq output index that maps queue to VLAN id in VLVFB
+ * @vlan_on: boolean flag to turn on/off VLAN
+ * @vlvf_bypass: boolean flag indicating updating default pool is okay
*
- * Turn on/off specified VLAN in the VLAN filter table.
+ * Turn on/off specified VLAN in the VLAN filter table.
**/
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, bool vlvf_bypass)
}
/**
- * ixgbe_set_vlvf_generic - Set VLAN Pool Filter
- * @hw: pointer to hardware structure
- * @vlan: VLAN id to write to VLAN filter
- * @vind: VMDq output index that maps queue to VLAN id in VLVFB
- * @vlan_on: boolean flag to turn on/off VLAN in VLVF
- * @vfta_delta: pointer to the difference between the current value of VFTA
+ * ixgbe_set_vlvf_generic - Set VLAN Pool Filter
+ * @hw: pointer to hardware structure
+ * @vlan: VLAN id to write to VLAN filter
+ * @vind: VMDq output index that maps queue to VLAN id in VLVFB
+ * @vlan_on: boolean flag to turn on/off VLAN in VLVF
+ * @vfta_delta: pointer to the difference between the current value of VFTA
* and the desired value
- * @vfta: the desired value of the VFTA
- * @vlvf_bypass: boolean flag indicating updating default pool is okay
+ * @vfta: the desired value of the VFTA
+ * @vlvf_bypass: boolean flag indicating updating default pool is okay
*
- * Turn on/off specified bit in VLVF table.
+ * Turn on/off specified bit in VLVF table.
**/
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, u32 *vfta_delta, u32 vfta,
}
/**
- * ixgbe_clear_vfta_generic - Clear VLAN filter table
- * @hw: pointer to hardware structure
+ * ixgbe_clear_vfta_generic - Clear VLAN filter table
+ * @hw: pointer to hardware structure
*
- * Clears the VLAN filer table, and the VMDq index associated with the filter
+ * Clears the VLAN filer table, and the VMDq index associated with the filter
**/
s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
- * @hw: pointer to hardware structure
+ * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
+ * @hw: pointer to hardware structure
*
- * Contains the logic to identify if we need to verify link for the
- * crosstalk fix
+ * Contains the logic to identify if we need to verify link for the
+ * crosstalk fix
**/
static bool ixgbe_need_crosstalk_fix(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_check_mac_link_generic - Determine link and speed status
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @link_up: true when link is up
- * @link_up_wait_to_complete: bool used to wait for link up or not
+ * ixgbe_check_mac_link_generic - Determine link and speed status
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @link_up: true when link is up
+ * @link_up_wait_to_complete: bool used to wait for link up or not
*
- * Reads the links register to determine if link is up and the current speed
+ * Reads the links register to determine if link is up and the current speed
**/
s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up, bool link_up_wait_to_complete)
}
/**
- * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
- * the EEPROM
- * @hw: pointer to hardware structure
- * @wwnn_prefix: the alternative WWNN prefix
- * @wwpn_prefix: the alternative WWPN prefix
+ * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
+ * the EEPROM
+ * @hw: pointer to hardware structure
+ * @wwnn_prefix: the alternative WWNN prefix
+ * @wwpn_prefix: the alternative WWPN prefix
*
- * This function will read the EEPROM from the alternative SAN MAC address
- * block to check the support for the alternative WWNN/WWPN prefix support.
+ * This function will read the EEPROM from the alternative SAN MAC address
+ * block to check the support for the alternative WWNN/WWPN prefix support.
**/
s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
u16 *wwpn_prefix)
}
/**
- * ixgbe_get_fcoe_boot_status_generic - Get FCOE boot status from EEPROM
- * @hw: pointer to hardware structure
- * @bs: the fcoe boot status
+ * ixgbe_get_fcoe_boot_status_generic - Get FCOE boot status from EEPROM
+ * @hw: pointer to hardware structure
+ * @bs: the fcoe boot status
*
- * This function will read the FCOE boot status from the iSCSI FCOE block
+ * This function will read the FCOE boot status from the iSCSI FCOE block
**/
s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs)
{
}
/**
- * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
- * @hw: pointer to hardware structure
- * @enable: enable or disable switch for MAC anti-spoofing
- * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
+ * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for MAC anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
*
**/
void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
}
/**
- * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
- * @hw: pointer to hardware structure
- * @enable: enable or disable switch for VLAN anti-spoofing
- * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
+ * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for VLAN anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
*
**/
void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
}
/**
- * ixgbe_get_device_caps_generic - Get additional device capabilities
- * @hw: pointer to hardware structure
- * @device_caps: the EEPROM word with the extra device capabilities
+ * ixgbe_get_device_caps_generic - Get additional device capabilities
+ * @hw: pointer to hardware structure
+ * @device_caps: the EEPROM word with the extra device capabilities
*
- * This function will read the EEPROM location for the device capabilities,
- * and return the word through device_caps.
+ * This function will read the EEPROM location for the device capabilities,
+ * and return the word through device_caps.
**/
s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps)
{
}
/**
- * ixgbe_enable_relaxed_ordering_gen2 - Enable relaxed ordering
- * @hw: pointer to hardware structure
+ * ixgbe_enable_relaxed_ordering_gen2 - Enable relaxed ordering
+ * @hw: pointer to hardware structure
*
**/
void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw)
}
/**
- * ixgbe_calculate_checksum - Calculate checksum for buffer
- * @buffer: pointer to EEPROM
- * @length: size of EEPROM to calculate a checksum for
- * Calculates the checksum for some buffer on a specified length. The
- * checksum calculated is returned.
+ * ixgbe_calculate_checksum - Calculate checksum for buffer
+ * @buffer: pointer to EEPROM
+ * @length: size of EEPROM to calculate a checksum for
+ * Calculates the checksum for some buffer on a specified length. The
+ * checksum calculated is returned.
**/
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
{
}
/**
- * ixgbe_hic_unlocked - Issue command to manageability block unlocked
- * @hw: pointer to the HW structure
- * @buffer: command to write and where the return status will be placed
- * @length: length of buffer, must be multiple of 4 bytes
- * @timeout: time in ms to wait for command completion
+ * ixgbe_hic_unlocked - Issue command to manageability block unlocked
+ * @hw: pointer to the HW structure
+ * @buffer: command to write and where the return status will be placed
+ * @length: length of buffer, must be multiple of 4 bytes
+ * @timeout: time in ms to wait for command completion
*
- * Communicates with the manageability block. On success return IXGBE_SUCCESS
- * else returns semaphore error when encountering an error acquiring
- * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
+ * Communicates with the manageability block. On success return IXGBE_SUCCESS
+ * else returns semaphore error when encountering an error acquiring
+ * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
*
- * This function assumes that the IXGBE_GSSR_SW_MNG_SM semaphore is held
- * by the caller.
+ * This function assumes that the IXGBE_GSSR_SW_MNG_SM semaphore is held
+ * by the caller.
**/
s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,
u32 timeout)
}
/**
- * ixgbe_host_interface_command - Issue command to manageability block
- * @hw: pointer to the HW structure
- * @buffer: contains the command to write and where the return status will
- * be placed
- * @length: length of buffer, must be multiple of 4 bytes
- * @timeout: time in ms to wait for command completion
- * @return_data: read and return data from the buffer (true) or not (false)
- * Needed because FW structures are big endian and decoding of
- * these fields can be 8 bit or 16 bit based on command. Decoding
- * is not easily understood without making a table of commands.
- * So we will leave this up to the caller to read back the data
- * in these cases.
+ * ixgbe_host_interface_command - Issue command to manageability block
+ * @hw: pointer to the HW structure
+ * @buffer: contains the command to write and where the return status will
+ * be placed
+ * @length: length of buffer, must be multiple of 4 bytes
+ * @timeout: time in ms to wait for command completion
+ * @return_data: read and return data from the buffer (true) or not (false)
+ * Needed because FW structures are big endian and decoding of
+ * these fields can be 8 bit or 16 bit based on command. Decoding
+ * is not easily understood without making a table of commands.
+ * So we will leave this up to the caller to read back the data
+ * in these cases.
*
- * Communicates with the manageability block. On success return IXGBE_SUCCESS
- * else returns semaphore error when encountering an error acquiring
- * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
+ * Communicates with the manageability block. On success return IXGBE_SUCCESS
+ * else returns semaphore error when encountering an error acquiring
+ * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
**/
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
u32 length, u32 timeout, bool return_data)
}
/**
- * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
- * @hw: pointer to the HW structure
- * @maj: driver version major number
- * @min: driver version minor number
- * @build: driver version build number
- * @sub: driver version sub build number
- * @len: unused
- * @driver_ver: unused
+ * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
+ * @hw: pointer to the HW structure
+ * @maj: driver version major number
+ * @min: driver version minor number
+ * @build: driver version build number
+ * @sub: driver version sub build number
+ * @len: unused
+ * @driver_ver: unused
*
- * Sends driver version number to firmware through the manageability
- * block. On success return IXGBE_SUCCESS
- * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring
- * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
+ * Sends driver version number to firmware through the manageability
+ * block. On success return IXGBE_SUCCESS
+ * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring
+ * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
**/
s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
u8 build, u8 sub, u16 len,
};
/**
- * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
- * @hw: pointer to hardware structure
+ * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
+ * @hw: pointer to hardware structure
*
- * Returns the thermal sensor data structure
+ * Returns the thermal sensor data structure
**/
s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
- * @hw: pointer to hardware structure
+ * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
+ * @hw: pointer to hardware structure
*
- * Inits the thermal sensor thresholds according to the NVM map
- * and save off the threshold and location values into mac.thermal_sensor_data
+ * Inits the thermal sensor thresholds according to the NVM map
+ * and save off the threshold and location values into mac.thermal_sensor_data
**/
s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_orom_version - Return option ROM from EEPROM
+ * ixgbe_get_orom_version - Return option ROM from EEPROM
*
- * @hw: pointer to hardware structure
- * @nvm_ver: pointer to output structure
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
*
- * if valid option ROM version, nvm_ver->or_valid set to true
- * else nvm_ver->or_valid is false.
+ * if valid option ROM version, nvm_ver->or_valid set to true
+ * else nvm_ver->or_valid is false.
**/
void ixgbe_get_orom_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver)
}
/**
- * ixgbe_get_oem_prod_version - Return OEM Product version
+ * ixgbe_get_oem_prod_version - Return OEM Product version
*
- * @hw: pointer to hardware structure
- * @nvm_ver: pointer to output structure
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
*
- * if valid OEM product version, nvm_ver->oem_valid set to true
- * else nvm_ver->oem_valid is false.
+ * if valid OEM product version, nvm_ver->oem_valid set to true
+ * else nvm_ver->oem_valid is false.
**/
void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver)
}
/**
- * ixgbe_get_etk_id - Return Etrack ID from EEPROM
+ * ixgbe_get_etk_id - Return Etrack ID from EEPROM
*
- * @hw: pointer to hardware structure
- * @nvm_ver: pointer to output structure
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
*
- * word read errors will return 0xFFFF
+ * word read errors will return 0xFFFF
**/
void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver)
{
}
/**
- * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Set the link speed in the MAC and/or PHY register and restarts link.
+ * Set the link speed in the MAC and/or PHY register and restarts link.
**/
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_set_soft_rate_select_speed - Set module link speed
- * @hw: pointer to hardware structure
- * @speed: link speed to set
+ * ixgbe_set_soft_rate_select_speed - Set module link speed
+ * @hw: pointer to hardware structure
+ * @speed: link speed to set
*
- * Set module link speed via the soft rate select.
+ * Set module link speed via the soft rate select.
*/
void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
ixgbe_link_speed speed)
* The following rules are checked:
* 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%.
* 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth
- * Group must total 100.
+ * Group must total 100.
* 3. A Traffic Class should not be set to both Link Strict Priority
- * and Group Strict Priority.
+ * and Group Strict Priority.
* 4. Link strict Bandwidth Groups can only have link strict traffic classes
- * with zero bandwidth.
+ * with zero bandwidth.
*/
s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config)
{
}
/**
- * ixgbevf_hv_negotiate_api_version_vf - Negotiate supported API version
- * @hw: pointer to the HW structure
- * @api: integer containing requested API version
- * Hyper-V version - only ixgbe_mbox_api_10 supported.
+ * ixgbevf_hv_negotiate_api_version_vf - Negotiate supported API version
+ * @hw: pointer to the HW structure
+ * @api: integer containing requested API version
+ * Hyper-V version - only ixgbe_mbox_api_10 supported.
**/
static int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api)
{
}
/**
- * ixgbevf_hv_init_ops_vf - Initialize the pointers for vf
- * @hw: pointer to hardware structure
+ * ixgbevf_hv_init_ops_vf - Initialize the pointers for vf
+ * @hw: pointer to hardware structure
*
- * This will assign function pointers, adapter-specific functions can
- * override the assignment of generic function pointers by assigning
- * their own adapter-specific function pointers.
- * Does not touch the hardware.
+ * This will assign function pointers, adapter-specific functions can
+ * override the assignment of generic function pointers by assigning
+ * their own adapter-specific function pointers.
+ * Does not touch the hardware.
**/
s32 ixgbevf_hv_init_ops_vf(struct ixgbe_hw *hw)
{
#include "ixgbe_mbx.h"
/**
- * ixgbe_read_mbx - Reads a message from the mailbox
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to read
+ * ixgbe_read_mbx - Reads a message from the mailbox
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to read
*
- * returns SUCCESS if it successfully read message from buffer
+ * returns SUCCESS if it successfully read message from buffer
**/
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
}
/**
- * ixgbe_write_mbx - Write a message to the mailbox
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to write
+ * ixgbe_write_mbx - Write a message to the mailbox
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully copied message into the buffer
+ * returns SUCCESS if it successfully copied message into the buffer
**/
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
}
/**
- * ixgbe_check_for_msg - checks to see if someone sent us mail
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_msg - checks to see if someone sent us mail
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns SUCCESS if the Status bit was found or else ERR_MBX
+ * returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_check_for_ack - checks to see if someone sent us ACK
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_ack - checks to see if someone sent us ACK
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns SUCCESS if the Status bit was found or else ERR_MBX
+ * returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_check_for_rst - checks to see if other side has reset
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_rst - checks to see if other side has reset
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns SUCCESS if the Status bit was found or else ERR_MBX
+ * returns SUCCESS if the Status bit was found or else ERR_MBX
**/
s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_poll_for_msg - Wait for message notification
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to write
+ * ixgbe_poll_for_msg - Wait for message notification
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully received a message notification
+ * returns SUCCESS if it successfully received a message notification
**/
STATIC s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_poll_for_ack - Wait for message acknowledgment
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to write
+ * ixgbe_poll_for_ack - Wait for message acknowledgment
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully received a message acknowledgment
+ * returns SUCCESS if it successfully received a message acknowledgment
**/
STATIC s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_read_posted_mbx - Wait for message notification and receive message
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to write
+ * ixgbe_read_posted_mbx - Wait for message notification and receive message
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully received a message notification and
- * copied it into the receive buffer.
+ * returns SUCCESS if it successfully received a message notification and
+ * copied it into the receive buffer.
**/
s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
}
/**
- * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to write
+ * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully copied message into the buffer and
- * received an ack to that message within delay * timeout period
+ * returns SUCCESS if it successfully copied message into the buffer and
+ * received an ack to that message within delay * timeout period
**/
s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 mbx_id)
}
/**
- * ixgbe_init_mbx_ops_generic - Initialize MB function pointers
- * @hw: pointer to the HW structure
+ * ixgbe_init_mbx_ops_generic - Initialize MB function pointers
+ * @hw: pointer to the HW structure
*
- * Setups up the mailbox read and write message function pointers
+ * Setups up the mailbox read and write message function pointers
**/
void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_v2p_mailbox - read v2p mailbox
- * @hw: pointer to the HW structure
+ * ixgbe_read_v2p_mailbox - read v2p mailbox
+ * @hw: pointer to the HW structure
*
- * This function is used to read the v2p mailbox without losing the read to
- * clear status bits.
+ * This function is used to read the v2p mailbox without losing the read to
+ * clear status bits.
**/
STATIC u32 ixgbe_read_v2p_mailbox(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_check_for_bit_vf - Determine if a status bit was set
- * @hw: pointer to the HW structure
- * @mask: bitmask for bits to be tested and cleared
+ * ixgbe_check_for_bit_vf - Determine if a status bit was set
+ * @hw: pointer to the HW structure
+ * @mask: bitmask for bits to be tested and cleared
*
- * This function is used to check for the read to clear bits within
- * the V2P mailbox.
+ * This function is used to check for the read to clear bits within
+ * the V2P mailbox.
**/
STATIC s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_check_for_msg_vf - checks to see if the PF has sent mail
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_msg_vf - checks to see if the PF has sent mail
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns SUCCESS if the PF has set the Status bit or else ERR_MBX
+ * returns SUCCESS if the PF has set the Status bit or else ERR_MBX
**/
STATIC s32 ixgbe_check_for_msg_vf(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_check_for_ack_vf - checks to see if the PF has ACK'd
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_ack_vf - checks to see if the PF has ACK'd
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns SUCCESS if the PF has set the ACK bit or else ERR_MBX
+ * returns SUCCESS if the PF has set the ACK bit or else ERR_MBX
**/
STATIC s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_check_for_rst_vf - checks to see if the PF has reset
- * @hw: pointer to the HW structure
- * @mbx_id: id of mailbox to check
+ * ixgbe_check_for_rst_vf - checks to see if the PF has reset
+ * @hw: pointer to the HW structure
+ * @mbx_id: id of mailbox to check
*
- * returns true if the PF has set the reset done bit or else false
+ * returns true if the PF has set the reset done bit or else false
**/
STATIC s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id)
{
}
/**
- * ixgbe_obtain_mbx_lock_vf - obtain mailbox lock
- * @hw: pointer to the HW structure
+ * ixgbe_obtain_mbx_lock_vf - obtain mailbox lock
+ * @hw: pointer to the HW structure
*
- * return SUCCESS if we obtained the mailbox lock
+ * return SUCCESS if we obtained the mailbox lock
**/
STATIC s32 ixgbe_obtain_mbx_lock_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_write_mbx_vf - Write a message to the mailbox
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to write
+ * ixgbe_write_mbx_vf - Write a message to the mailbox
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to write
*
- * returns SUCCESS if it successfully copied message into the buffer
+ * returns SUCCESS if it successfully copied message into the buffer
**/
STATIC s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 mbx_id)
}
/**
- * ixgbe_read_mbx_vf - Reads a message from the inbox intended for vf
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @mbx_id: id of mailbox to read
+ * ixgbe_read_mbx_vf - Reads a message from the inbox intended for vf
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @mbx_id: id of mailbox to read
*
- * returns SUCCESS if it successfully read message from buffer
+ * returns SUCCESS if it successfully read message from buffer
**/
STATIC s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 mbx_id)
}
/**
- * ixgbe_init_mbx_params_vf - set initial values for vf mailbox
- * @hw: pointer to the HW structure
+ * ixgbe_init_mbx_params_vf - set initial values for vf mailbox
+ * @hw: pointer to the HW structure
*
- * Initializes the hw->mbx struct to correct values for vf mailbox
+ * Initializes the hw->mbx struct to correct values for vf mailbox
*/
void ixgbe_init_mbx_params_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
- * @hw: pointer to the HW structure
- * @vf_number: the VF index
+ * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
+ * @hw: pointer to the HW structure
+ * @vf_number: the VF index
*
- * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
+ * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
**/
STATIC s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
{
}
/**
- * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
- * @hw: pointer to the HW structure
- * @vf_number: the VF index
+ * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
+ * @hw: pointer to the HW structure
+ * @vf_number: the VF index
*
- * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
+ * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
**/
STATIC s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
{
}
/**
- * ixgbe_check_for_rst_pf - checks to see if the VF has reset
- * @hw: pointer to the HW structure
- * @vf_number: the VF index
+ * ixgbe_check_for_rst_pf - checks to see if the VF has reset
+ * @hw: pointer to the HW structure
+ * @vf_number: the VF index
*
- * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
+ * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
**/
STATIC s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
{
}
/**
- * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
- * @hw: pointer to the HW structure
- * @vf_number: the VF index
+ * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
+ * @hw: pointer to the HW structure
+ * @vf_number: the VF index
*
- * return SUCCESS if we obtained the mailbox lock
+ * return SUCCESS if we obtained the mailbox lock
**/
STATIC s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
{
}
/**
- * ixgbe_write_mbx_pf - Places a message in the mailbox
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @vf_number: the VF index
+ * ixgbe_write_mbx_pf - Places a message in the mailbox
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @vf_number: the VF index
*
- * returns SUCCESS if it successfully copied message into the buffer
+ * returns SUCCESS if it successfully copied message into the buffer
**/
STATIC s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 vf_number)
}
/**
- * ixgbe_read_mbx_pf - Read a message from the mailbox
- * @hw: pointer to the HW structure
- * @msg: The message buffer
- * @size: Length of buffer
- * @vf_number: the VF index
+ * ixgbe_read_mbx_pf - Read a message from the mailbox
+ * @hw: pointer to the HW structure
+ * @msg: The message buffer
+ * @size: Length of buffer
+ * @vf_number: the VF index
*
- * This function copies a message from the mailbox buffer to the caller's
- * memory buffer. The presumption is that the caller knows that there was
- * a message due to a VF request so no polling for message is needed.
+ * This function copies a message from the mailbox buffer to the caller's
+ * memory buffer. The presumption is that the caller knows that there was
+ * a message due to a VF request so no polling for message is needed.
**/
STATIC s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
u16 vf_number)
}
/**
- * ixgbe_init_mbx_params_pf - set initial values for pf mailbox
- * @hw: pointer to the HW structure
+ * ixgbe_init_mbx_params_pf - set initial values for pf mailbox
+ * @hw: pointer to the HW structure
*
- * Initializes the hw->mbx struct to correct values for pf mailbox
+ * Initializes the hw->mbx struct to correct values for pf mailbox
*/
void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_phy_ops_generic - Inits PHY function ptrs
- * @hw: pointer to the hardware structure
+ * ixgbe_init_phy_ops_generic - Inits PHY function ptrs
+ * @hw: pointer to the hardware structure
*
- * Initialize the function pointers.
+ * Initialize the function pointers.
**/
s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_identify_phy_generic - Get physical layer module
- * @hw: pointer to hardware structure
+ * ixgbe_identify_phy_generic - Get physical layer module
+ * @hw: pointer to hardware structure
*
- * Determines the physical layer module found on the current adapter.
+ * Determines the physical layer module found on the current adapter.
**/
s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_validate_phy_addr - Determines phy address is valid
- * @hw: pointer to hardware structure
- * @phy_addr: PHY address
+ * ixgbe_validate_phy_addr - Determines phy address is valid
+ * @hw: pointer to hardware structure
+ * @phy_addr: PHY address
*
**/
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
}
/**
- * ixgbe_get_phy_id - Get the phy type
- * @hw: pointer to hardware structure
+ * ixgbe_get_phy_id - Get the phy type
+ * @hw: pointer to hardware structure
*
**/
s32 ixgbe_get_phy_id(struct ixgbe_hw *hw)
}
/**
- * ixgbe_get_phy_type_from_id - Get the phy type
- * @phy_id: PHY ID information
+ * ixgbe_get_phy_type_from_id - Get the phy type
+ * @phy_id: PHY ID information
*
**/
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
}
/**
- * ixgbe_reset_phy_generic - Performs a PHY reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_phy_generic - Performs a PHY reset
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_phy_mdi - Reads a value from a specified PHY register without
- * the SWFW lock
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit address of PHY register to read
- * @device_type: 5 bit device type
- * @phy_data: Pointer to read data from PHY register
+ * ixgbe_read_phy_mdi - Reads a value from a specified PHY register without
+ * the SWFW lock
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit address of PHY register to read
+ * @device_type: 5 bit device type
+ * @phy_data: Pointer to read data from PHY register
**/
s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
u16 *phy_data)
}
/**
- * ixgbe_read_phy_reg_generic - Reads a value from a specified PHY register
- * using the SWFW lock - this function is needed in most cases
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit address of PHY register to read
- * @device_type: 5 bit device type
- * @phy_data: Pointer to read data from PHY register
+ * ixgbe_read_phy_reg_generic - Reads a value from a specified PHY register
+ * using the SWFW lock - this function is needed in most cases
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit address of PHY register to read
+ * @device_type: 5 bit device type
+ * @phy_data: Pointer to read data from PHY register
**/
s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u16 *phy_data)
}
/**
- * ixgbe_write_phy_reg_mdi - Writes a value to specified PHY register
- * without SWFW lock
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 5 bit device type
- * @phy_data: Data to write to the PHY register
+ * ixgbe_write_phy_reg_mdi - Writes a value to specified PHY register
+ * without SWFW lock
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 5 bit device type
+ * @phy_data: Data to write to the PHY register
**/
s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u16 phy_data)
}
/**
- * ixgbe_write_phy_reg_generic - Writes a value to specified PHY register
- * using SWFW lock- this function is needed in most cases
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 5 bit device type
- * @phy_data: Data to write to the PHY register
+ * ixgbe_write_phy_reg_generic - Writes a value to specified PHY register
+ * using SWFW lock- this function is needed in most cases
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 5 bit device type
+ * @phy_data: Data to write to the PHY register
**/
s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u16 phy_data)
}
/**
- * ixgbe_setup_phy_link_generic - Set and restart auto-neg
- * @hw: pointer to hardware structure
+ * ixgbe_setup_phy_link_generic - Set and restart auto-neg
+ * @hw: pointer to hardware structure
*
- * Restart auto-negotiation and PHY and waits for completion.
+ * Restart auto-negotiation and PHY and waits for completion.
**/
s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_phy_link_speed_generic - Sets the auto advertised capabilities
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: unused
+ * ixgbe_setup_phy_link_speed_generic - Sets the auto advertised capabilities
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: unused
**/
s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_get_copper_link_capabilities_generic - Determines link capabilities
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @autoneg: boolean auto-negotiation value
+ * ixgbe_get_copper_link_capabilities_generic - Determines link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @autoneg: boolean auto-negotiation value
**/
s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
}
/**
- * ixgbe_check_phy_link_tnx - Determine link and speed status
- * @hw: pointer to hardware structure
- * @speed: current link speed
- * @link_up: true is link is up, false otherwise
+ * ixgbe_check_phy_link_tnx - Determine link and speed status
+ * @hw: pointer to hardware structure
+ * @speed: current link speed
+ * @link_up: true is link is up, false otherwise
*
- * Reads the VS1 register to determine if link is up and the current speed for
- * the PHY.
+ * Reads the VS1 register to determine if link is up and the current speed for
+ * the PHY.
**/
s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up)
}
/**
- * ixgbe_get_phy_firmware_version_tnx - Gets the PHY Firmware Version
- * @hw: pointer to hardware structure
- * @firmware_version: pointer to the PHY Firmware Version
+ * ixgbe_get_phy_firmware_version_tnx - Gets the PHY Firmware Version
+ * @hw: pointer to hardware structure
+ * @firmware_version: pointer to the PHY Firmware Version
**/
s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,
u16 *firmware_version)
}
/**
- * ixgbe_get_phy_firmware_version_generic - Gets the PHY Firmware Version
- * @hw: pointer to hardware structure
- * @firmware_version: pointer to the PHY Firmware Version
+ * ixgbe_get_phy_firmware_version_generic - Gets the PHY Firmware Version
+ * @hw: pointer to hardware structure
+ * @firmware_version: pointer to the PHY Firmware Version
**/
s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,
u16 *firmware_version)
}
/**
- * ixgbe_reset_phy_nl - Performs a PHY reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_phy_nl - Performs a PHY reset
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_identify_module_generic - Identifies module type
- * @hw: pointer to hardware structure
+ * ixgbe_identify_module_generic - Identifies module type
+ * @hw: pointer to hardware structure
*
- * Determines HW type and calls appropriate function.
+ * Determines HW type and calls appropriate function.
**/
s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_identify_sfp_module_generic - Identifies SFP modules
- * @hw: pointer to hardware structure
+ * ixgbe_identify_sfp_module_generic - Identifies SFP modules
+ * @hw: pointer to hardware structure
*
- * Searches for and identifies the SFP module and assigns appropriate PHY type.
+ * Searches for and identifies the SFP module and assigns appropriate PHY type.
**/
s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_supported_phy_sfp_layer_generic - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_phy_sfp_layer_generic - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current SFP.
+ * Determines physical layer capabilities of the current SFP.
*/
u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_identify_qsfp_module_generic - Identifies QSFP modules
- * @hw: pointer to hardware structure
+ * ixgbe_identify_qsfp_module_generic - Identifies QSFP modules
+ * @hw: pointer to hardware structure
*
- * Searches for and identifies the QSFP module and assigns appropriate PHY type
+ * Searches for and identifies the QSFP module and assigns appropriate PHY type
**/
s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_sfp_init_sequence_offsets - Provides offset of PHY init sequence
- * @hw: pointer to hardware structure
- * @list_offset: offset to the SFP ID list
- * @data_offset: offset to the SFP data block
+ * ixgbe_get_sfp_init_sequence_offsets - Provides offset of PHY init sequence
+ * @hw: pointer to hardware structure
+ * @list_offset: offset to the SFP ID list
+ * @data_offset: offset to the SFP data block
*
- * Checks the MAC's EEPROM to see if it supports a given SFP+ module type, if
- * so it returns the offsets to the phy init sequence block.
+ * Checks the MAC's EEPROM to see if it supports a given SFP+ module type, if
+ * so it returns the offsets to the phy init sequence block.
**/
s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
u16 *list_offset,
}
/**
- * ixgbe_read_i2c_eeprom_generic - Reads 8 bit EEPROM word over I2C interface
- * @hw: pointer to hardware structure
- * @byte_offset: EEPROM byte offset to read
- * @eeprom_data: value read
+ * ixgbe_read_i2c_eeprom_generic - Reads 8 bit EEPROM word over I2C interface
+ * @hw: pointer to hardware structure
+ * @byte_offset: EEPROM byte offset to read
+ * @eeprom_data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
u8 *eeprom_data)
}
/**
- * ixgbe_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset at address 0xA2
- * @sff8472_data: value read
+ * ixgbe_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset at address 0xA2
+ * @sff8472_data: value read
*
- * Performs byte read operation to SFP module's SFF-8472 data over I2C
+ * Performs byte read operation to SFP module's SFF-8472 data over I2C
**/
STATIC s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
u8 *sff8472_data)
}
/**
- * ixgbe_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface
- * @hw: pointer to hardware structure
- * @byte_offset: EEPROM byte offset to write
- * @eeprom_data: value to write
+ * ixgbe_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface
+ * @hw: pointer to hardware structure
+ * @byte_offset: EEPROM byte offset to write
+ * @eeprom_data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
u8 eeprom_data)
}
/**
- * ixgbe_read_i2c_byte_generic_int - Reads 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: address to read from
- * @data: value read
- * @lock: true if to take and release semaphore
+ * ixgbe_read_i2c_byte_generic_int - Reads 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: address to read from
+ * @data: value read
+ * @lock: true if to take and release semaphore
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
STATIC s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data, bool lock)
}
/**
- * ixgbe_read_i2c_byte_generic - Reads 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: address to read from
- * @data: value read
+ * ixgbe_read_i2c_byte_generic - Reads 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: address to read from
+ * @data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data)
}
/**
- * ixgbe_read_i2c_byte_generic_unlocked - Reads 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to read
- * @dev_addr: address to read from
- * @data: value read
+ * ixgbe_read_i2c_byte_generic_unlocked - Reads 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to read
+ * @dev_addr: address to read from
+ * @data: value read
*
- * Performs byte read operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte read operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data)
}
/**
- * ixgbe_write_i2c_byte_generic_int - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: address to write to
- * @data: value to write
- * @lock: true if to take and release semaphore
+ * ixgbe_write_i2c_byte_generic_int - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: address to write to
+ * @data: value to write
+ * @lock: true if to take and release semaphore
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
STATIC s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data, bool lock)
}
/**
- * ixgbe_write_i2c_byte_generic - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: address to write to
- * @data: value to write
+ * ixgbe_write_i2c_byte_generic - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: address to write to
+ * @data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data)
}
/**
- * ixgbe_write_i2c_byte_generic_unlocked - Writes 8 bit word over I2C
- * @hw: pointer to hardware structure
- * @byte_offset: byte offset to write
- * @dev_addr: address to write to
- * @data: value to write
+ * ixgbe_write_i2c_byte_generic_unlocked - Writes 8 bit word over I2C
+ * @hw: pointer to hardware structure
+ * @byte_offset: byte offset to write
+ * @dev_addr: address to write to
+ * @data: value to write
*
- * Performs byte write operation to SFP module's EEPROM over I2C interface at
- * a specified device address.
+ * Performs byte write operation to SFP module's EEPROM over I2C interface at
+ * a specified device address.
**/
s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data)
}
/**
- * ixgbe_i2c_start - Sets I2C start condition
- * @hw: pointer to hardware structure
+ * ixgbe_i2c_start - Sets I2C start condition
+ * @hw: pointer to hardware structure
*
- * Sets I2C start condition (High -> Low on SDA while SCL is High)
- * Set bit-bang mode on X550 hardware.
+ * Sets I2C start condition (High -> Low on SDA while SCL is High)
+ * Set bit-bang mode on X550 hardware.
**/
STATIC void ixgbe_i2c_start(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_i2c_stop - Sets I2C stop condition
- * @hw: pointer to hardware structure
+ * ixgbe_i2c_stop - Sets I2C stop condition
+ * @hw: pointer to hardware structure
*
- * Sets I2C stop condition (Low -> High on SDA while SCL is High)
- * Disables bit-bang mode and negates data output enable on X550
- * hardware.
+ * Sets I2C stop condition (Low -> High on SDA while SCL is High)
+ * Disables bit-bang mode and negates data output enable on X550
+ * hardware.
**/
STATIC void ixgbe_i2c_stop(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_clock_in_i2c_byte - Clocks in one byte via I2C
- * @hw: pointer to hardware structure
- * @data: data byte to clock in
+ * ixgbe_clock_in_i2c_byte - Clocks in one byte via I2C
+ * @hw: pointer to hardware structure
+ * @data: data byte to clock in
*
- * Clocks in one byte data via I2C data/clock
+ * Clocks in one byte data via I2C data/clock
**/
STATIC s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)
{
}
/**
- * ixgbe_clock_out_i2c_byte - Clocks out one byte via I2C
- * @hw: pointer to hardware structure
- * @data: data byte clocked out
+ * ixgbe_clock_out_i2c_byte - Clocks out one byte via I2C
+ * @hw: pointer to hardware structure
+ * @data: data byte clocked out
*
- * Clocks out one byte data via I2C data/clock
+ * Clocks out one byte data via I2C data/clock
**/
STATIC s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)
{
}
/**
- * ixgbe_get_i2c_ack - Polls for I2C ACK
- * @hw: pointer to hardware structure
+ * ixgbe_get_i2c_ack - Polls for I2C ACK
+ * @hw: pointer to hardware structure
*
- * Clocks in/out one bit via I2C data/clock
+ * Clocks in/out one bit via I2C data/clock
**/
STATIC s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
- * @hw: pointer to hardware structure
- * @data: read data value
+ * ixgbe_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
+ * @hw: pointer to hardware structure
+ * @data: read data value
*
- * Clocks in one bit via I2C data/clock
+ * Clocks in one bit via I2C data/clock
**/
STATIC s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
{
}
/**
- * ixgbe_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
- * @hw: pointer to hardware structure
- * @data: data value to write
+ * ixgbe_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
+ * @hw: pointer to hardware structure
+ * @data: data value to write
*
- * Clocks out one bit via I2C data/clock
+ * Clocks out one bit via I2C data/clock
**/
STATIC s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
{
}
/**
- * ixgbe_raise_i2c_clk - Raises the I2C SCL clock
- * @hw: pointer to hardware structure
- * @i2cctl: Current value of I2CCTL register
+ * ixgbe_raise_i2c_clk - Raises the I2C SCL clock
+ * @hw: pointer to hardware structure
+ * @i2cctl: Current value of I2CCTL register
*
- * Raises the I2C clock line '0'->'1'
- * Negates the I2C clock output enable on X550 hardware.
+ * Raises the I2C clock line '0'->'1'
+ * Negates the I2C clock output enable on X550 hardware.
**/
STATIC void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
{
}
/**
- * ixgbe_lower_i2c_clk - Lowers the I2C SCL clock
- * @hw: pointer to hardware structure
- * @i2cctl: Current value of I2CCTL register
+ * ixgbe_lower_i2c_clk - Lowers the I2C SCL clock
+ * @hw: pointer to hardware structure
+ * @i2cctl: Current value of I2CCTL register
*
- * Lowers the I2C clock line '1'->'0'
- * Asserts the I2C clock output enable on X550 hardware.
+ * Lowers the I2C clock line '1'->'0'
+ * Asserts the I2C clock output enable on X550 hardware.
**/
STATIC void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
{
}
/**
- * ixgbe_set_i2c_data - Sets the I2C data bit
- * @hw: pointer to hardware structure
- * @i2cctl: Current value of I2CCTL register
- * @data: I2C data value (0 or 1) to set
+ * ixgbe_set_i2c_data - Sets the I2C data bit
+ * @hw: pointer to hardware structure
+ * @i2cctl: Current value of I2CCTL register
+ * @data: I2C data value (0 or 1) to set
*
- * Sets the I2C data bit
- * Asserts the I2C data output enable on X550 hardware.
+ * Sets the I2C data bit
+ * Asserts the I2C data output enable on X550 hardware.
**/
STATIC s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
{
}
/**
- * ixgbe_get_i2c_data - Reads the I2C SDA data bit
- * @hw: pointer to hardware structure
- * @i2cctl: Current value of I2CCTL register
+ * ixgbe_get_i2c_data - Reads the I2C SDA data bit
+ * @hw: pointer to hardware structure
+ * @i2cctl: Current value of I2CCTL register
*
- * Returns the I2C data bit value
- * Negates the I2C data output enable on X550 hardware.
+ * Returns the I2C data bit value
+ * Negates the I2C data output enable on X550 hardware.
**/
STATIC bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
{
}
/**
- * ixgbe_i2c_bus_clear - Clears the I2C bus
- * @hw: pointer to hardware structure
+ * ixgbe_i2c_bus_clear - Clears the I2C bus
+ * @hw: pointer to hardware structure
*
- * Clears the I2C bus by sending nine clock pulses.
- * Used when data line is stuck low.
+ * Clears the I2C bus by sending nine clock pulses.
+ * Used when data line is stuck low.
**/
void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_tn_check_overtemp - Checks if an overtemp occurred.
- * @hw: pointer to hardware structure
+ * ixgbe_tn_check_overtemp - Checks if an overtemp occurred.
+ * @hw: pointer to hardware structure
*
- * Checks if the LASI temp alarm status was triggered due to overtemp
+ * Checks if the LASI temp alarm status was triggered due to overtemp
**/
s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)
{
#endif
/**
- * ixgbe_init_ops_vf - Initialize the pointers for vf
- * @hw: pointer to hardware structure
+ * ixgbe_init_ops_vf - Initialize the pointers for vf
+ * @hw: pointer to hardware structure
*
- * This will assign function pointers, adapter-specific functions can
- * override the assignment of generic function pointers by assigning
- * their own adapter-specific function pointers.
- * Does not touch the hardware.
+ * This will assign function pointers, adapter-specific functions can
+ * override the assignment of generic function pointers by assigning
+ * their own adapter-specific function pointers.
+ * Does not touch the hardware.
**/
s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
{
}
/* ixgbe_virt_clr_reg - Set register to default (power on) state.
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*/
static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware by filling the bus info structure and media type, clears
- * all on chip counters, initializes receive address registers, multicast
- * table, VLAN filter table, calls routine to set up link and flow control
- * settings, and leaves transmit and receive units disabled and uninitialized
+ * Starts the hardware by filling the bus info structure and media type, clears
+ * all on chip counters, initializes receive address registers, multicast
+ * table, VLAN filter table, calls routine to set up link and flow control
+ * settings, and leaves transmit and receive units disabled and uninitialized
**/
s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_hw_vf - virtual function hardware initialization
- * @hw: pointer to hardware structure
+ * ixgbe_init_hw_vf - virtual function hardware initialization
+ * @hw: pointer to hardware structure
*
- * Initialize the hardware by resetting the hardware and then starting
- * the hardware
+ * Initialize the hardware by resetting the hardware and then starting
+ * the hardware
**/
s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_reset_hw_vf - Performs hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw_vf - Performs hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks and
- * clears all interrupts.
+ * Resets the hardware by resetting the transmit and receive units, masks and
+ * clears all interrupts.
**/
s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
- * @hw: pointer to hardware structure
+ * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
+ * @hw: pointer to hardware structure
*
- * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
- * disables transmit and receive units. The adapter_stopped flag is used by
- * the shared code and drivers to determine if the adapter is in a stopped
- * state and should not touch the hardware.
+ * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
+ * disables transmit and receive units. The adapter_stopped flag is used by
+ * the shared code and drivers to determine if the adapter is in a stopped
+ * state and should not touch the hardware.
**/
s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_mta_vector - Determines bit-vector in multicast table to set
- * @hw: pointer to hardware structure
- * @mc_addr: the multicast address
+ * ixgbe_mta_vector - Determines bit-vector in multicast table to set
+ * @hw: pointer to hardware structure
+ * @mc_addr: the multicast address
*
- * Extracts the 12 bits, from a multicast address, to determine which
- * bit-vector to set in the multicast table. The hardware uses 12 bits, from
- * incoming rx multicast addresses, to determine the bit-vector to check in
- * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
- * by the MO field of the MCSTCTRL. The MO field is set during initialization
- * to mc_filter_type.
+ * Extracts the 12 bits, from a multicast address, to determine which
+ * bit-vector to set in the multicast table. The hardware uses 12 bits, from
+ * incoming rx multicast addresses, to determine the bit-vector to check in
+ * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
+ * by the MO field of the MCSTCTRL. The MO field is set during initialization
+ * to mc_filter_type.
**/
STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
{
}
/**
- * ixgbe_set_rar_vf - set device MAC address
- * @hw: pointer to hardware structure
- * @index: Receive address register to write
- * @addr: Address to put into receive address register
- * @vmdq: VMDq "set" or "pool" index
- * @enable_addr: set flag that address is active
+ * ixgbe_set_rar_vf - set device MAC address
+ * @hw: pointer to hardware structure
+ * @index: Receive address register to write
+ * @addr: Address to put into receive address register
+ * @vmdq: VMDq "set" or "pool" index
+ * @enable_addr: set flag that address is active
**/
s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
u32 enable_addr)
}
/**
- * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
- * @hw: pointer to the HW structure
- * @mc_addr_list: array of multicast addresses to program
- * @mc_addr_count: number of multicast addresses to program
- * @next: caller supplied function to return next address in list
- * @clear: unused
+ * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
+ * @hw: pointer to the HW structure
+ * @mc_addr_list: array of multicast addresses to program
+ * @mc_addr_count: number of multicast addresses to program
+ * @next: caller supplied function to return next address in list
+ * @clear: unused
*
- * Updates the Multicast Table Array.
+ * Updates the Multicast Table Array.
**/
s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count, ixgbe_mc_addr_itr next,
}
/**
- * ixgbevf_update_xcast_mode - Update Multicast mode
- * @hw: pointer to the HW structure
- * @xcast_mode: new multicast mode
+ * ixgbevf_update_xcast_mode - Update Multicast mode
+ * @hw: pointer to the HW structure
+ * @xcast_mode: new multicast mode
*
- * Updates the Multicast Mode of VF.
+ * Updates the Multicast Mode of VF.
**/
s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
{
}
/**
- * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
- * @hw: pointer to the HW structure
- * @vlan: 12 bit VLAN ID
- * @vind: unused by VF drivers
- * @vlan_on: if true then set bit, else clear bit
- * @vlvf_bypass: boolean flag indicating updating default pool is okay
+ * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
+ * @hw: pointer to the HW structure
+ * @vlan: 12 bit VLAN ID
+ * @vind: unused by VF drivers
+ * @vlan_on: if true then set bit, else clear bit
+ * @vlvf_bypass: boolean flag indicating updating default pool is okay
*
- * Turn on/off specified VLAN in the VLAN filter table.
+ * Turn on/off specified VLAN in the VLAN filter table.
**/
s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, bool vlvf_bypass)
}
/**
- * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
- * @hw: pointer to hardware structure
+ * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
+ * @hw: pointer to hardware structure
*
- * Returns the number of transmit queues for the given adapter.
+ * Returns the number of transmit queues for the given adapter.
**/
u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
- * @hw: pointer to hardware structure
+ * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
+ * @hw: pointer to hardware structure
*
- * Returns the number of receive queues for the given adapter.
+ * Returns the number of receive queues for the given adapter.
**/
u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_mac_link_vf - Setup MAC link settings
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_vf - Setup MAC link settings
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Set the link speed in the AUTOC register and restarts link.
+ * Set the link speed in the AUTOC register and restarts link.
**/
s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
bool autoneg_wait_to_complete)
}
/**
- * ixgbe_check_mac_link_vf - Get link/speed status
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @link_up: true is link is up, false otherwise
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_check_mac_link_vf - Get link/speed status
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @link_up: true is link is up, false otherwise
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
*
- * Reads the links register to determine if link is up and the current speed
+ * Reads the links register to determine if link is up and the current speed
**/
s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up, bool autoneg_wait_to_complete)
}
/**
- * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
- * @hw: pointer to the HW structure
- * @max_size: value to assign to max frame size
+ * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
+ * @hw: pointer to the HW structure
+ * @max_size: value to assign to max frame size
**/
s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
{
}
/**
- * ixgbevf_negotiate_api_version - Negotiate supported API version
- * @hw: pointer to the HW structure
- * @api: integer containing requested API version
+ * ixgbevf_negotiate_api_version - Negotiate supported API version
+ * @hw: pointer to the HW structure
+ * @api: integer containing requested API version
**/
int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
{
STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
/**
- * ixgbe_init_ops_X540 - Inits func ptrs and MAC type
- * @hw: pointer to hardware structure
+ * ixgbe_init_ops_X540 - Inits func ptrs and MAC type
+ * @hw: pointer to hardware structure
*
- * Initialize the function pointers and assign the MAC type for X540.
- * Does not touch the hardware.
+ * Initialize the function pointers and assign the MAC type for X540.
+ * Does not touch the hardware.
**/
s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_link_capabilities_X540 - Determines link capabilities
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @autoneg: true when autoneg or autotry is enabled
+ * ixgbe_get_link_capabilities_X540 - Determines link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @autoneg: true when autoneg or autotry is enabled
*
- * Determines the link capabilities by reading the AUTOC register.
+ * Determines the link capabilities by reading the AUTOC register.
**/
s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
}
/**
- * ixgbe_get_media_type_X540 - Get media type
- * @hw: pointer to hardware structure
+ * ixgbe_get_media_type_X540 - Get media type
+ * @hw: pointer to hardware structure
*
- * Returns the media type (fiber, copper, backplane)
+ * Returns the media type (fiber, copper, backplane)
**/
enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: true when waiting for completion is needed
+ * ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: true when waiting for completion is needed
**/
s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_reset_hw_X540 - Perform hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw_X540 - Perform hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks
- * and clears all interrupts, and perform a reset.
+ * Resets the hardware by resetting the transmit and receive units, masks
+ * and clears all interrupts, and perform a reset.
**/
s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
- * @hw: pointer to hardware structure
+ * ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
+ * @hw: pointer to hardware structure
*
- * Starts the hardware using the generic start_hw function
- * and the generation start_hw function.
- * Then performs revision-specific operations, if any.
+ * Starts the hardware using the generic start_hw function
+ * and the generation start_hw function.
+ * Then performs revision-specific operations, if any.
**/
s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_supported_physical_layer_X540 - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_physical_layer_X540 - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current configuration.
+ * Determines physical layer capabilities of the current configuration.
**/
u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
- * @hw: pointer to hardware structure
+ * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
+ * @hw: pointer to hardware structure
*
- * Initializes the EEPROM parameters ixgbe_eeprom_info within the
- * ixgbe_hw struct in order to set up EEPROM access.
+ * Initializes the EEPROM parameters ixgbe_eeprom_info within the
+ * ixgbe_hw struct in order to set up EEPROM access.
**/
s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_eerd_X540- Read EEPROM word using EERD
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @data: word read from the EEPROM
+ * ixgbe_read_eerd_X540- Read EEPROM word using EERD
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @data: word read from the EEPROM
*
- * Reads a 16 bit word from the EEPROM using the EERD register.
+ * Reads a 16 bit word from the EEPROM using the EERD register.
**/
s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)
{
}
/**
- * ixgbe_read_eerd_buffer_X540- Read EEPROM word(s) using EERD
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @words: number of words
- * @data: word(s) read from the EEPROM
+ * ixgbe_read_eerd_buffer_X540- Read EEPROM word(s) using EERD
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @words: number of words
+ * @data: word(s) read from the EEPROM
*
- * Reads a 16 bit word(s) from the EEPROM using the EERD register.
+ * Reads a 16 bit word(s) from the EEPROM using the EERD register.
**/
s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw,
u16 offset, u16 words, u16 *data)
}
/**
- * ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @data: word write to the EEPROM
+ * ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @data: word write to the EEPROM
*
- * Write a 16 bit word to the EEPROM using the EEWR register.
+ * Write a 16 bit word to the EEPROM using the EEWR register.
**/
s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)
{
}
/**
- * ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @words: number of words
- * @data: word(s) write to the EEPROM
+ * ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @words: number of words
+ * @data: word(s) write to the EEPROM
*
- * Write a 16 bit word(s) to the EEPROM using the EEWR register.
+ * Write a 16 bit word(s) to the EEPROM using the EEWR register.
**/
s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw,
u16 offset, u16 words, u16 *data)
}
/**
- * ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
+ * ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
*
- * This function does not use synchronization for EERD and EEWR. It can
- * be used internally by function which utilize ixgbe_acquire_swfw_sync_X540.
+ * This function does not use synchronization for EERD and EEWR. It can
+ * be used internally by function which utilize ixgbe_acquire_swfw_sync_X540.
*
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*
- * Returns a negative error code on error, or the 16-bit checksum
+ * Returns a negative error code on error, or the 16-bit checksum
**/
s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
- * @hw: pointer to hardware structure
- * @checksum_val: calculated checksum
+ * ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
+ * @hw: pointer to hardware structure
+ * @checksum_val: calculated checksum
*
- * Performs checksum calculation and validates the EEPROM checksum. If the
- * caller does not need checksum_val, the value can be NULL.
+ * Performs checksum calculation and validates the EEPROM checksum. If the
+ * caller does not need checksum_val, the value can be NULL.
**/
s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,
u16 *checksum_val)
}
/**
- * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
- * @hw: pointer to hardware structure
+ * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
+ * @hw: pointer to hardware structure
*
- * Set FLUP (bit 23) of the EEC register to instruct Hardware to copy
- * EEPROM from shadow RAM to the flash device.
+ * Set FLUP (bit 23) of the EEC register to instruct Hardware to copy
+ * EEPROM from shadow RAM to the flash device.
**/
s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_poll_flash_update_done_X540 - Poll flash update status
- * @hw: pointer to hardware structure
+ * ixgbe_poll_flash_update_done_X540 - Poll flash update status
+ * @hw: pointer to hardware structure
*
- * Polls the FLUDONE (bit 26) of the EEC Register to determine when the
- * flash update is done.
+ * Polls the FLUDONE (bit 26) of the EEC Register to determine when the
+ * flash update is done.
**/
STATIC s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to acquire
+ * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
*
- * Acquires the SWFW semaphore thought the SW_FW_SYNC register for
- * the specified function (CSR, PHY0, PHY1, NVM, Flash)
+ * Acquires the SWFW semaphore thought the SW_FW_SYNC register for
+ * the specified function (CSR, PHY0, PHY1, NVM, Flash)
**/
s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to release
+ * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
*
- * Releases the SWFW semaphore through the SW_FW_SYNC register
- * for the specified function (CSR, PHY0, PHY1, EVM, Flash)
+ * Releases the SWFW semaphore through the SW_FW_SYNC register
+ * for the specified function (CSR, PHY0, PHY1, EVM, Flash)
**/
void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
+ * @hw: pointer to hardware structure
*
- * Sets the hardware semaphores so SW/FW can gain control of shared resources
+ * Sets the hardware semaphores so SW/FW can gain control of shared resources
**/
STATIC s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
+ * @hw: pointer to hardware structure
*
- * This function clears hardware semaphore bits.
+ * This function clears hardware semaphore bits.
**/
STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_swfw_sync_X540 - Release hardware semaphore
- * @hw: pointer to hardware structure
+ * ixgbe_init_swfw_sync_X540 - Release hardware semaphore
+ * @hw: pointer to hardware structure
*
- * This function reset hardware semaphore bits for a semaphore that may
- * have be left locked due to a catastrophic failure.
+ * This function reset hardware semaphore bits for a semaphore that may
+ * have be left locked due to a catastrophic failure.
**/
void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)
{
* @index: led number to blink
*
* Devices that implement the version 2 interface:
- * X540
+ * X540
**/
s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
{
* @index: led number to stop blinking
*
* Devices that implement the version 2 interface:
- * X540
+ * X540
**/
s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
{
STATIC s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw);
/**
- * ixgbe_init_ops_X550 - Inits func ptrs and MAC type
- * @hw: pointer to hardware structure
+ * ixgbe_init_ops_X550 - Inits func ptrs and MAC type
+ * @hw: pointer to hardware structure
*
- * Initialize the function pointers and assign the MAC type for X550.
- * Does not touch the hardware.
+ * Initialize the function pointers and assign the MAC type for X550.
+ * Does not touch the hardware.
**/
s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)
{
* ixgbe_fc_autoneg_fw _ Set up flow control for FW-controlled PHYs
* @hw: pointer to hardware structure
*
- * Called at init time to set up flow control.
+ * Called at init time to set up flow control.
*/
static s32 ixgbe_fc_autoneg_fw(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_config_X550
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_config_X550
+ * @hw: pointer to hardware structure
*
- * Configure DMA coalescing. If enabling dmac, dmac is activated.
- * When disabling dmac, dmac enable dmac bit is cleared.
+ * Configure DMA coalescing. If enabling dmac, dmac is activated.
+ * When disabling dmac, dmac enable dmac bit is cleared.
**/
s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_config_tcs_X550
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_config_tcs_X550
+ * @hw: pointer to hardware structure
*
- * Configure DMA coalescing threshold per TC. The dmac enable bit must
- * be cleared before configuring.
+ * Configure DMA coalescing threshold per TC. The dmac enable bit must
+ * be cleared before configuring.
**/
s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_dmac_update_tcs_X550
- * @hw: pointer to hardware structure
+ * ixgbe_dmac_update_tcs_X550
+ * @hw: pointer to hardware structure
*
- * Disables dmac, updates per TC settings, and then enables dmac.
+ * Disables dmac, updates per TC settings, and then enables dmac.
**/
s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_eeprom_params_X550 - Initialize EEPROM params
- * @hw: pointer to hardware structure
+ * ixgbe_init_eeprom_params_X550 - Initialize EEPROM params
+ * @hw: pointer to hardware structure
*
- * Initializes the EEPROM parameters ixgbe_eeprom_info within the
- * ixgbe_hw struct in order to set up EEPROM access.
+ * Initializes the EEPROM parameters ixgbe_eeprom_info within the
+ * ixgbe_hw struct in order to set up EEPROM access.
**/
s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_set_ethertype_anti_spoofing_X550 - Configure Ethertype anti-spoofing
- * @hw: pointer to hardware structure
- * @enable: enable or disable switch for Ethertype anti-spoofing
- * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
+ * ixgbe_set_ethertype_anti_spoofing_X550 - Configure Ethertype anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for Ethertype anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
*
**/
void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
}
/**
- * ixgbe_write_iosf_sb_reg_x550 - Writes a value to specified register
- * of the IOSF device
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 3 bit device type
- * @data: Data to write to the register
+ * ixgbe_write_iosf_sb_reg_x550 - Writes a value to specified register
+ * of the IOSF device
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 3 bit device type
+ * @data: Data to write to the register
**/
s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 data)
}
/**
- * ixgbe_read_iosf_sb_reg_x550 - Reads specified register of the IOSF device
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 3 bit device type
- * @data: Pointer to read data from the register
+ * ixgbe_read_iosf_sb_reg_x550 - Reads specified register of the IOSF device
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 3 bit device type
+ * @data: Pointer to read data from the register
**/
s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 *data)
}
/**
- * ixgbe_write_iosf_sb_reg_x550a - Writes a value to specified register
- * of the IOSF device
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 3 bit device type
- * @data: Data to write to the register
+ * ixgbe_write_iosf_sb_reg_x550a - Writes a value to specified register
+ * of the IOSF device
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 3 bit device type
+ * @data: Data to write to the register
**/
s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 data)
}
/**
- * ixgbe_read_iosf_sb_reg_x550a - Reads specified register of the IOSF device
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 3 bit device type
- * @data: Pointer to read data from the register
+ * ixgbe_read_iosf_sb_reg_x550a - Reads specified register of the IOSF device
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 3 bit device type
+ * @data: Pointer to read data from the register
**/
s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u32 *data)
}
/**
- * ixgbe_disable_mdd_X550
- * @hw: pointer to hardware structure
+ * ixgbe_disable_mdd_X550
+ * @hw: pointer to hardware structure
*
- * Disable malicious driver detection
+ * Disable malicious driver detection
**/
void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_enable_mdd_X550
- * @hw: pointer to hardware structure
+ * ixgbe_enable_mdd_X550
+ * @hw: pointer to hardware structure
*
- * Enable malicious driver detection
+ * Enable malicious driver detection
**/
void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_restore_mdd_vf_X550
- * @hw: pointer to hardware structure
- * @vf: vf index
+ * ixgbe_restore_mdd_vf_X550
+ * @hw: pointer to hardware structure
+ * @vf: vf index
*
- * Restore VF that was disabled during malicious driver detection event
+ * Restore VF that was disabled during malicious driver detection event
**/
void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)
{
}
/**
- * ixgbe_mdd_event_X550
- * @hw: pointer to hardware structure
- * @vf_bitmap: vf bitmap of malicious vfs
+ * ixgbe_mdd_event_X550
+ * @hw: pointer to hardware structure
+ * @vf_bitmap: vf bitmap of malicious vfs
*
- * Handle malicious driver detection event.
+ * Handle malicious driver detection event.
**/
void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap)
{
}
/**
- * ixgbe_get_media_type_X550em - Get media type
- * @hw: pointer to hardware structure
+ * ixgbe_get_media_type_X550em - Get media type
+ * @hw: pointer to hardware structure
*
- * Returns the media type (fiber, copper, backplane)
+ * Returns the media type (fiber, copper, backplane)
*/
enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported
- * @hw: pointer to hardware structure
- * @linear: true if SFP module is linear
+ * ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported
+ * @hw: pointer to hardware structure
+ * @linear: true if SFP module is linear
*/
STATIC s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
{
}
/**
- * ixgbe_identify_sfp_module_X550em - Identifies SFP modules
- * @hw: pointer to hardware structure
+ * ixgbe_identify_sfp_module_X550em - Identifies SFP modules
+ * @hw: pointer to hardware structure
*
- * Searches for and identifies the SFP module and assigns appropriate PHY type.
+ * Searches for and identifies the SFP module and assigns appropriate PHY type.
**/
s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_sfp_modules_X550em - Setup MAC link ops
- * @hw: pointer to hardware structure
+ * ixgbe_setup_sfp_modules_X550em - Setup MAC link ops
+ * @hw: pointer to hardware structure
*/
s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_mac_link_ops_X550em - init mac link function pointers
- * @hw: pointer to hardware structure
+ * ixgbe_init_mac_link_ops_X550em - init mac link function pointers
+ * @hw: pointer to hardware structure
*/
void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_link_capabilities_x550em - Determines link capabilities
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @autoneg: true when autoneg or autotry is enabled
+ * ixgbe_get_link_capabilities_x550em - Determines link capabilities
+ * @hw: pointer to hardware structure
+ * @speed: pointer to link speed
+ * @autoneg: true when autoneg or autotry is enabled
*/
s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
* ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause
* @hw: pointer to hardware structure
* @lsc: pointer to boolean flag which indicates whether external Base T
- * PHY interrupt is lsc
+ * PHY interrupt is lsc
*
* Determime if external Base T PHY interrupt cause is high temperature
* failure alarm or link status change.
}
/**
- * ixgbe_setup_kr_speed_x550em - Configure the KR PHY for link speed.
- * @hw: pointer to hardware structure
- * @speed: link speed
+ * ixgbe_setup_kr_speed_x550em - Configure the KR PHY for link speed.
+ * @hw: pointer to hardware structure
+ * @speed: link speed
*
- * Configures the integrated KR PHY.
+ * Configures the integrated KR PHY.
**/
STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
ixgbe_link_speed speed)
}
/**
- * ixgbe_read_mng_if_sel_x550em - Read NW_MNG_IF_SEL register
- * @hw: pointer to hardware structure
+ * ixgbe_read_mng_if_sel_x550em - Read NW_MNG_IF_SEL register
+ * @hw: pointer to hardware structure
*
- * Read NW_MNG_IF_SEL register and save field values, and check for valid field
- * values.
+ * Read NW_MNG_IF_SEL register and save field values, and check for valid field
+ * values.
**/
STATIC s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_init_phy_ops_X550em - PHY/SFP specific init
- * @hw: pointer to hardware structure
+ * ixgbe_init_phy_ops_X550em - PHY/SFP specific init
+ * @hw: pointer to hardware structure
*
- * Initialize any function pointers that were not able to be
- * set during init_shared_code because the PHY/SFP type was
- * not known. Perform the SFP init if necessary.
+ * Initialize any function pointers that were not able to be
+ * set during init_shared_code because the PHY/SFP type was
+ * not known. Perform the SFP init if necessary.
*/
s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
{
/**
* ixgbe_set_mdio_speed - Set MDIO clock speed
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*/
STATIC void ixgbe_set_mdio_speed(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_reset_hw_X550em - Perform hardware reset
- * @hw: pointer to hardware structure
+ * ixgbe_reset_hw_X550em - Perform hardware reset
+ * @hw: pointer to hardware structure
*
- * Resets the hardware by resetting the transmit and receive units, masks
- * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
- * reset.
+ * Resets the hardware by resetting the transmit and receive units, masks
+ * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
+ * reset.
*/
s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_kr_x550em - Configure the KR PHY.
- * @hw: pointer to hardware structure
+ * ixgbe_setup_kr_x550em - Configure the KR PHY.
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: unused
+ * ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: unused
*
- * Configure the external PHY and the integrated KR PHY for SFP support.
+ * Configure the external PHY and the integrated KR PHY for SFP support.
**/
s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_setup_sfi_x550a - Configure the internal PHY for native SFI mode
- * @hw: pointer to hardware structure
- * @speed: the link speed to force
+ * ixgbe_setup_sfi_x550a - Configure the internal PHY for native SFI mode
+ * @hw: pointer to hardware structure
+ * @speed: the link speed to force
*
- * Configures the integrated PHY for native SFI mode. Used to connect the
- * internal PHY directly to an SFP cage, without autonegotiation.
+ * Configures the integrated PHY for native SFI mode. Used to connect the
+ * internal PHY directly to an SFP cage, without autonegotiation.
**/
STATIC s32 ixgbe_setup_sfi_x550a(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
{
}
/**
- * ixgbe_setup_mac_link_sfp_x550a - Setup internal PHY for SFP
- * @hw: pointer to hardware structure
- * @speed: new link speed
- * @autoneg_wait_to_complete: unused
+ * ixgbe_setup_mac_link_sfp_x550a - Setup internal PHY for SFP
+ * @hw: pointer to hardware structure
+ * @speed: new link speed
+ * @autoneg_wait_to_complete: unused
*
- * Configure the integrated PHY for SFP support.
+ * Configure the integrated PHY for SFP support.
**/
s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
}
/**
- * ixgbe_setup_ixfi_x550em_x - MAC specific iXFI configuration
- * @hw: pointer to hardware structure
+ * ixgbe_setup_ixfi_x550em_x - MAC specific iXFI configuration
+ * @hw: pointer to hardware structure
*
- * iXfI configuration needed for ixgbe_mac_X550EM_x devices.
+ * iXfI configuration needed for ixgbe_mac_X550EM_x devices.
**/
STATIC s32 ixgbe_setup_ixfi_x550em_x(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
- * @hw: pointer to hardware structure
- * @speed: the link speed to force
+ * ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
+ * @hw: pointer to hardware structure
+ * @speed: the link speed to force
*
- * Configures the integrated KR PHY to use iXFI mode. Used to connect an
- * internal and external PHY at a specific speed, without autonegotiation.
+ * Configures the integrated KR PHY to use iXFI mode. Used to connect an
+ * internal and external PHY at a specific speed, without autonegotiation.
**/
STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
{
}
/**
- * ixgbe_setup_phy_loopback_x550em - Configure the KR PHY for loopback.
- * @hw: pointer to hardware structure
+ * ixgbe_setup_phy_loopback_x550em - Configure the KR PHY for loopback.
+ * @hw: pointer to hardware structure
*
- * Configures the integrated KR PHY to use internal loopback mode.
+ * Configures the integrated KR PHY to use internal loopback mode.
**/
s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_read_ee_hostif_X550 - Read EEPROM word using a host interface command
- * assuming that the semaphore is already obtained.
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @data: word read from the EEPROM
+ * ixgbe_read_ee_hostif_X550 - Read EEPROM word using a host interface command
+ * assuming that the semaphore is already obtained.
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @data: word read from the EEPROM
*
- * Reads a 16 bit word from the EEPROM using the hostif.
+ * Reads a 16 bit word from the EEPROM using the hostif.
**/
s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, u16 *data)
{
}
/**
- * ixgbe_read_ee_hostif_buffer_X550- Read EEPROM word(s) using hostif
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to read
- * @words: number of words
- * @data: word(s) read from the EEPROM
+ * ixgbe_read_ee_hostif_buffer_X550- Read EEPROM word(s) using hostif
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @words: number of words
+ * @data: word(s) read from the EEPROM
*
- * Reads a 16 bit word(s) from the EEPROM using the hostif.
+ * Reads a 16 bit word(s) from the EEPROM using the hostif.
**/
s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw,
u16 offset, u16 words, u16 *data)
}
/**
- * ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @data: word write to the EEPROM
+ * ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @data: word write to the EEPROM
*
- * Write a 16 bit word to the EEPROM using the hostif.
+ * Write a 16 bit word to the EEPROM using the hostif.
**/
s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
u16 data)
}
/**
- * ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @data: word write to the EEPROM
+ * ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @data: word write to the EEPROM
*
- * Write a 16 bit word to the EEPROM using the hostif.
+ * Write a 16 bit word to the EEPROM using the hostif.
**/
s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,
u16 data)
}
/**
- * ixgbe_write_ee_hostif_buffer_X550 - Write EEPROM word(s) using hostif
- * @hw: pointer to hardware structure
- * @offset: offset of word in the EEPROM to write
- * @words: number of words
- * @data: word(s) write to the EEPROM
+ * ixgbe_write_ee_hostif_buffer_X550 - Write EEPROM word(s) using hostif
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to write
+ * @words: number of words
+ * @data: word(s) write to the EEPROM
*
- * Write a 16 bit word(s) to the EEPROM using the hostif.
+ * Write a 16 bit word(s) to the EEPROM using the hostif.
**/
s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw,
u16 offset, u16 words, u16 *data)
}
/**
- * ixgbe_calc_checksum_X550 - Calculates and returns the checksum
- * @hw: pointer to hardware structure
- * @buffer: pointer to buffer containing calculated checksum
- * @buffer_size: size of buffer
+ * ixgbe_calc_checksum_X550 - Calculates and returns the checksum
+ * @hw: pointer to hardware structure
+ * @buffer: pointer to buffer containing calculated checksum
+ * @buffer_size: size of buffer
*
- * Returns a negative error code on error, or the 16-bit checksum
+ * Returns a negative error code on error, or the 16-bit checksum
**/
s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)
{
}
/**
- * ixgbe_calc_eeprom_checksum_X550 - Calculates and returns the checksum
- * @hw: pointer to hardware structure
+ * ixgbe_calc_eeprom_checksum_X550 - Calculates and returns the checksum
+ * @hw: pointer to hardware structure
*
- * Returns a negative error code on error, or the 16-bit checksum
+ * Returns a negative error code on error, or the 16-bit checksum
**/
s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_validate_eeprom_checksum_X550 - Validate EEPROM checksum
- * @hw: pointer to hardware structure
- * @checksum_val: calculated checksum
+ * ixgbe_validate_eeprom_checksum_X550 - Validate EEPROM checksum
+ * @hw: pointer to hardware structure
+ * @checksum_val: calculated checksum
*
- * Performs checksum calculation and validates the EEPROM checksum. If the
- * caller does not need checksum_val, the value can be NULL.
+ * Performs checksum calculation and validates the EEPROM checksum. If the
+ * caller does not need checksum_val, the value can be NULL.
**/
s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val)
{
}
/**
- * ixgbe_update_flash_X550 - Instruct HW to copy EEPROM to Flash device
- * @hw: pointer to hardware structure
+ * ixgbe_update_flash_X550 - Instruct HW to copy EEPROM to Flash device
+ * @hw: pointer to hardware structure
*
- * Issue a shadow RAM dump to FW to copy EEPROM from shadow RAM to the flash.
+ * Issue a shadow RAM dump to FW to copy EEPROM from shadow RAM to the flash.
**/
s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_get_supported_physical_layer_X550em - Returns physical layer type
- * @hw: pointer to hardware structure
+ * ixgbe_get_supported_physical_layer_X550em - Returns physical layer type
+ * @hw: pointer to hardware structure
*
- * Determines physical layer capabilities of the current configuration.
+ * Determines physical layer capabilities of the current configuration.
**/
u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw)
{
/**
* ixgbe_enter_lplu_x550em - Transition to low power states
- * @hw: pointer to hardware structure
+ * @hw: pointer to hardware structure
*
* Configures Low Power Link Up on transition to low power states
* (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the
/**
* ixgbe_get_lcd_x550em - Determine lowest common denominator
- * @hw: pointer to hardware structure
- * @lcd_speed: pointer to lowest common link speed
+ * @hw: pointer to hardware structure
+ * @lcd_speed: pointer to lowest common link speed
*
* Determine lowest common link speed with link partner.
**/
}
/**
- * ixgbe_setup_fc_X550em - Set up flow control
- * @hw: pointer to hardware structure
+ * ixgbe_setup_fc_X550em - Set up flow control
+ * @hw: pointer to hardware structure
*
- * Called at init time to set up flow control.
+ * Called at init time to set up flow control.
**/
s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_autoneg_backplane_x550em_a - Enable flow control IEEE clause 37
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_backplane_x550em_a - Enable flow control IEEE clause 37
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to IEEE clause 37.
+ * Enable flow control according to IEEE clause 37.
**/
void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_fc_autoneg_fiber_x550em_a - passthrough FC settings
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_fiber_x550em_a - passthrough FC settings
+ * @hw: pointer to hardware structure
*
**/
void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw)
}
/**
- * ixgbe_fc_autoneg_sgmii_x550em_a - Enable flow control IEEE clause 37
- * @hw: pointer to hardware structure
+ * ixgbe_fc_autoneg_sgmii_x550em_a - Enable flow control IEEE clause 37
+ * @hw: pointer to hardware structure
*
- * Enable flow control according to IEEE clause 37.
+ * Enable flow control according to IEEE clause 37.
**/
void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_setup_fc_backplane_x550em_a - Set up flow control
- * @hw: pointer to hardware structure
+ * ixgbe_setup_fc_backplane_x550em_a - Set up flow control
+ * @hw: pointer to hardware structure
*
- * Called at init time to set up flow control.
+ * Called at init time to set up flow control.
**/
s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_acquire_swfw_sync_X550em - Acquire SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to acquire
+ * ixgbe_acquire_swfw_sync_X550em - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
*
- * Acquires the SWFW semaphore and sets the I2C MUX
+ * Acquires the SWFW semaphore and sets the I2C MUX
**/
s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_release_swfw_sync_X550em - Release SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to release
+ * ixgbe_release_swfw_sync_X550em - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
*
- * Releases the SWFW semaphore and sets the I2C MUX
+ * Releases the SWFW semaphore and sets the I2C MUX
**/
void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_acquire_swfw_sync_X550a - Acquire SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to acquire
+ * ixgbe_acquire_swfw_sync_X550a - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
*
- * Acquires the SWFW semaphore and get the shared phy token as needed
+ * Acquires the SWFW semaphore and get the shared phy token as needed
*/
STATIC s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_release_swfw_sync_X550a - Release SWFW semaphore
- * @hw: pointer to hardware structure
- * @mask: Mask to specify which semaphore to release
+ * ixgbe_release_swfw_sync_X550a - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
*
- * Releases the SWFW semaphore and puts the shared phy token as needed
+ * Releases the SWFW semaphore and puts the shared phy token as needed
*/
STATIC void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
{
}
/**
- * ixgbe_read_phy_reg_x550a - Reads specified PHY register
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit address of PHY register to read
- * @device_type: 5 bit device type
- * @phy_data: Pointer to read data from PHY register
+ * ixgbe_read_phy_reg_x550a - Reads specified PHY register
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit address of PHY register to read
+ * @device_type: 5 bit device type
+ * @phy_data: Pointer to read data from PHY register
*
- * Reads a value from a specified PHY register using the SWFW lock and PHY
- * Token. The PHY Token is needed since the MDIO is shared between to MAC
- * instances.
+ * Reads a value from a specified PHY register using the SWFW lock and PHY
+ * Token. The PHY Token is needed since the MDIO is shared between to MAC
+ * instances.
**/
s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u16 *phy_data)
}
/**
- * ixgbe_write_phy_reg_x550a - Writes specified PHY register
- * @hw: pointer to hardware structure
- * @reg_addr: 32 bit PHY register to write
- * @device_type: 5 bit device type
- * @phy_data: Data to write to the PHY register
+ * ixgbe_write_phy_reg_x550a - Writes specified PHY register
+ * @hw: pointer to hardware structure
+ * @reg_addr: 32 bit PHY register to write
+ * @device_type: 5 bit device type
+ * @phy_data: Data to write to the PHY register
*
- * Writes a value to specified PHY register using the SWFW lock and PHY Token.
- * The PHY Token is needed since the MDIO is shared between to MAC instances.
+ * Writes a value to specified PHY register using the SWFW lock and PHY Token.
+ * The PHY Token is needed since the MDIO is shared between to MAC instances.
**/
s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
u32 device_type, u16 phy_data)
}
/**
- * ixgbe_reset_phy_t_X550em - Performs X557 PHY reset and enables LASI
- * @hw: pointer to hardware structure
+ * ixgbe_reset_phy_t_X550em - Performs X557 PHY reset and enables LASI
+ * @hw: pointer to hardware structure
**/
s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw)
{
}
/**
- * ixgbe_led_on_t_X550em - Turns on the software controllable LEDs.
- * @hw: pointer to hardware structure
- * @led_idx: led number to turn on
+ * ixgbe_led_on_t_X550em - Turns on the software controllable LEDs.
+ * @hw: pointer to hardware structure
+ * @led_idx: led number to turn on
**/
s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
{
}
/**
- * ixgbe_led_off_t_X550em - Turns off the software controllable LEDs.
- * @hw: pointer to hardware structure
- * @led_idx: led number to turn off
+ * ixgbe_led_off_t_X550em - Turns off the software controllable LEDs.
+ * @hw: pointer to hardware structure
+ * @led_idx: led number to turn off
**/
s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
{
}
/**
- * ixgbe_set_fw_drv_ver_x550 - Sends driver version to firmware
- * @hw: pointer to the HW structure
- * @maj: driver version major number
- * @min: driver version minor number
- * @build: driver version build number
- * @sub: driver version sub build number
- * @len: length of driver_ver string
- * @driver_ver: driver string
+ * ixgbe_set_fw_drv_ver_x550 - Sends driver version to firmware
+ * @hw: pointer to the HW structure
+ * @maj: driver version major number
+ * @min: driver version minor number
+ * @build: driver version build number
+ * @sub: driver version sub build number
+ * @len: length of driver_ver string
+ * @driver_ver: driver string
*
- * Sends driver version number to firmware through the manageability
- * block. On success return IXGBE_SUCCESS
- * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring
- * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
+ * Sends driver version number to firmware through the manageability
+ * block. On success return IXGBE_SUCCESS
+ * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring
+ * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
**/
s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,
u8 build, u8 sub, u16 len, const char *driver_ver)
git.droids-corp.org / dpdk.git / commitdiff