net/octeontx2: offload bad L2/L3/L4 UDP lengths detection

Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.

These errors will be propagated to the ol_flags as follows.

L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index e60f490..7202af6 100644 (file)
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -70,7 +70,13 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, uint32_t nb_txq)
                req->rx_cfg |= BIT_ULL(37 /* CSUM_OL4 */);
                req->rx_cfg |= BIT_ULL(36 /* CSUM_IL4 */);
        }
-       req->rx_cfg |= BIT_ULL(32 /* DROP_RE */);
+       req->rx_cfg |= (BIT_ULL(32 /* DROP_RE */)             |
+                       BIT_ULL(33 /* Outer L2 Length */)     |
+                       BIT_ULL(38 /* Inner L4 UDP Length */) |
+                       BIT_ULL(39 /* Inner L3 Length */)     |
+                       BIT_ULL(40 /* Outer L4 UDP Length */) |
+                       BIT_ULL(41 /* Outer L3 Length */));
+
        if (dev->rss_tag_as_xor == 0)
                req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER;
 

diff --git a/drivers/net/octeontx2/otx2_lookup.c b/drivers/net/octeontx2/otx2_lookup.c
index 89365ff..9dcfc75 100644 (file)
--- a/drivers/net/octeontx2/otx2_lookup.c
+++ b/drivers/net/octeontx2/otx2_lookup.c
@@ -270,7 +270,9 @@ nix_create_rx_ol_flags_array(void *mem)
 
                switch (errlev) {
                case NPC_ERRLEV_RE:
-                       /* Mark all errors as BAD checksum errors */
+                       /* Mark all errors as BAD checksum errors
+                        * including Outer L2 length mismatch error
+                        */
                        if (errcode) {
                                val |= PKT_RX_IP_CKSUM_BAD;
                                val |= PKT_RX_L4_CKSUM_BAD;
@@ -295,18 +297,25 @@ nix_create_rx_ol_flags_array(void *mem)
                                val |= PKT_RX_IP_CKSUM_GOOD;
                        break;
                case NPC_ERRLEV_NIX:
-                       val |= PKT_RX_IP_CKSUM_GOOD;
-                       if (errcode == NIX_RX_PERRCODE_OL4_CHK) {
+                       if (errcode == NIX_RX_PERRCODE_OL4_CHK ||
+                           errcode == NIX_RX_PERRCODE_OL4_LEN ||
+                           errcode == NIX_RX_PERRCODE_OL4_PORT) {
+                               val |= PKT_RX_IP_CKSUM_GOOD;
                                val |= PKT_RX_OUTER_L4_CKSUM_BAD;
+                       } else if (errcode == NIX_RX_PERRCODE_IL4_CHK ||
+                                  errcode == NIX_RX_PERRCODE_IL4_LEN ||
+                                  errcode == NIX_RX_PERRCODE_IL4_PORT) {
+                               val |= PKT_RX_IP_CKSUM_GOOD;
                                val |= PKT_RX_L4_CKSUM_BAD;
-                       } else if (errcode == NIX_RX_PERRCODE_IL4_CHK) {
-                               val |= PKT_RX_L4_CKSUM_BAD;
+                       } else if (errcode == NIX_RX_PERRCODE_IL3_LEN ||
+                                  errcode == NIX_RX_PERRCODE_OL3_LEN) {
+                               val |= PKT_RX_IP_CKSUM_BAD;
                        } else {
+                               val |= PKT_RX_IP_CKSUM_GOOD;
                                val |= PKT_RX_L4_CKSUM_GOOD;
                        }
                        break;
                }
-
                ol_flags[idx] = val;
        }
 }