ehfc = 1;
AXGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, ehfc);
+
+ PMD_DRV_LOG(DEBUG, "flow control %s for RXq%u\n",
+ ehfc ? "enabled" : "disabled", i);
}
/* Set MAC flow control */
/*Calculate and config Flow control threshold*/
axgbe_calculate_flow_control_threshold(pdata);
axgbe_config_flow_control_threshold(pdata);
+
+ PMD_DRV_LOG(DEBUG, "%d Rx hardware queues, %d byte fifo per queue\n",
+ pdata->rx_q_count, q_fifo_size);
}
static void axgbe_config_tx_fifo_size(struct axgbe_port *pdata)
for (i = 0; i < pdata->tx_q_count; i++)
AXGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, p_fifo);
+
+ PMD_DRV_LOG(DEBUG, "%d Tx hardware queues, %d byte fifo per queue\n",
+ pdata->tx_q_count, q_fifo_size);
}
static void axgbe_config_queue_mapping(struct axgbe_port *pdata)
qptc_extra = pdata->tx_q_count % pdata->hw_feat.tc_cnt;
for (i = 0, queue = 0; i < pdata->hw_feat.tc_cnt; i++) {
- for (j = 0; j < qptc; j++)
+ for (j = 0; j < qptc; j++) {
+ PMD_DRV_LOG(DEBUG, "TXq%u mapped to TC%u\n", queue, i);
AXGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
Q2TCMAP, i);
- if (i < qptc_extra)
+ }
+ if (i < qptc_extra) {
+ PMD_DRV_LOG(DEBUG, "TXq%u mapped to TC%u\n", queue, i);
AXGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
Q2TCMAP, i);
+ }
}
if (pdata->rss_enable) {
pdata->phy_if.an_isr(pdata);
/*DMA related interrupts*/
dma_isr = AXGMAC_IOREAD(pdata, DMA_ISR);
+ PMD_DRV_LOG(DEBUG, "DMA_ISR=%#010x\n", dma_isr);
if (dma_isr) {
if (dma_isr & 1) {
dma_ch_isr =
AXGMAC_DMA_IOREAD((struct axgbe_rx_queue *)
pdata->rx_queues[0],
DMA_CH_SR);
+ PMD_DRV_LOG(DEBUG, "DMA_CH0_ISR=%#010x\n", dma_ch_isr);
AXGMAC_DMA_IOWRITE((struct axgbe_rx_queue *)
pdata->rx_queues[0],
DMA_CH_SR, dma_ch_isr);
isr = XI2C_IOREAD(pdata, IC_RAW_INTR_STAT);
+ PMD_DRV_LOG(DEBUG, "I2C interrupt received: status=%#010x\n", isr);
+
axgbe_i2c_clear_isr_interrupts(pdata, isr);
if (isr & AXGBE_INTR_TX_ABRT) {
+ PMD_DRV_LOG(DEBUG,
+ "I2C TX_ABRT received (%#010x) for target %#04x\n",
+ state->tx_abort_source, state->op->target);
+
axgbe_i2c_disable_interrupts(pdata);
state->ret = -EIO;
if (!pdata->i2c.started)
return;
+ PMD_DRV_LOG(DEBUG, "stopping I2C\n");
+
pdata->i2c.started = 0;
axgbe_i2c_disable_interrupts(pdata);
axgbe_i2c_disable(pdata);
if (pdata->i2c.started)
return 0;
+ PMD_DRV_LOG(DEBUG, "starting I2C\n");
+
pdata->i2c.started = 1;
return 0;
{
axgbe_an73_enable_interrupts(pdata);
axgbe_an73_set(pdata, true, true);
+
+ PMD_DRV_LOG(DEBUG, "CL73 AN enabled/restarted\n");
}
static void axgbe_an73_disable(struct axgbe_port *pdata)
axgbe_an73_set(pdata, false, false);
axgbe_an73_disable_interrupts(pdata);
pdata->an_start = 0;
+
+ PMD_DRV_LOG(DEBUG, "CL73 AN disabled\n");
}
static void axgbe_an_restart(struct axgbe_port *pdata)
XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL,
reg);
+ PMD_DRV_LOG(DEBUG, "KR training initiated\n");
+
if (pdata->phy_if.phy_impl.kr_training_post)
pdata->phy_if.phy_impl.kr_training_post(pdata);
}
pdata->kx_state = AXGBE_RX_BPA;
pdata->an_start = rte_get_timer_cycles();
+
+ PMD_DRV_LOG(NOTICE,
+ "CL73 AN timed out, resetting state\n");
}
}
return AXGBE_AN_INCOMPAT_LINK;
}
+static const char *axgbe_state_as_string(enum axgbe_an state)
+{
+ switch (state) {
+ case AXGBE_AN_READY:
+ return "Ready";
+ case AXGBE_AN_PAGE_RECEIVED:
+ return "Page-Received";
+ case AXGBE_AN_INCOMPAT_LINK:
+ return "Incompatible-Link";
+ case AXGBE_AN_COMPLETE:
+ return "Complete";
+ case AXGBE_AN_NO_LINK:
+ return "No-Link";
+ case AXGBE_AN_ERROR:
+ return "Error";
+ default:
+ return "Undefined";
+ }
+}
+
static void axgbe_an73_state_machine(struct axgbe_port *pdata)
{
enum axgbe_an cur_state = pdata->an_state;
pdata->an_state = AXGBE_AN_ERROR;
}
+ PMD_DRV_LOG(DEBUG, "CL73 AN : %s\n",
+ axgbe_state_as_string(pdata->an_state));
+
again:
cur_state = pdata->an_state;
pdata->an_start = 0;
if (pdata->phy_if.phy_impl.an_post)
pdata->phy_if.phy_impl.an_post(pdata);
+
+ PMD_DRV_LOG(DEBUG, "CL73 AN result: %s\n",
+ axgbe_state_as_string(pdata->an_result));
}
if (cur_state != pdata->an_state)
static void axgbe_an_isr(struct axgbe_port *pdata)
{
+ PMD_DRV_LOG(DEBUG, "AN interrupt received\n");
+
switch (pdata->an_mode) {
case AXGBE_AN_MODE_CL73:
case AXGBE_AN_MODE_CL73_REDRV:
reg &= ~AXGBE_XNP_NP_EXCHANGE;
XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
+
+ PMD_DRV_LOG(DEBUG, "CL73 AN initialized\n");
}
static void axgbe_an_init(struct axgbe_port *pdata)
{
enum axgbe_mode mode;
+ PMD_DRV_LOG(DEBUG, "fixed PHY configuration\n");
+
/* Disable auto-negotiation */
axgbe_an_disable(pdata);
ret = axgbe_phy_config_fixed(pdata);
if (ret || !pdata->kr_redrv)
return ret;
+ PMD_DRV_LOG(DEBUG, "AN redriver support\n");
+ } else {
+ PMD_DRV_LOG(DEBUG, "AN PHY configuration\n");
}
/* Disable auto-negotiation interrupt */
link_timeout = pdata->link_check + (AXGBE_LINK_TIMEOUT *
2 * rte_get_timer_hz());
ticks = rte_get_timer_cycles();
- if (time_after(ticks, link_timeout))
+ if (time_after(ticks, link_timeout)) {
+ PMD_DRV_LOG(NOTICE, "AN link timeout\n");
axgbe_phy_config_aneg(pdata);
+ }
}
static enum axgbe_mode axgbe_phy_status_aneg(struct axgbe_port *pdata)
static void axgbe_phy_stop(struct axgbe_port *pdata)
{
+ PMD_DRV_LOG(DEBUG, "stopping PHY\n");
if (!pdata->phy_started)
return;
/* Indicate the PHY is down */
{
int ret;
+ PMD_DRV_LOG(DEBUG, "starting PHY\n");
+
ret = pdata->phy_if.phy_impl.start(pdata);
if (ret)
return ret;
phy_data->sfp_speed = AXGBE_SFP_SPEED_UNKNOWN;
}
+static const char *axgbe_base_as_string(enum axgbe_sfp_base sfp_base)
+{
+ switch (sfp_base) {
+ case AXGBE_SFP_BASE_1000_T:
+ return "1G_T";
+ case AXGBE_SFP_BASE_1000_SX:
+ return "1G_SX";
+ case AXGBE_SFP_BASE_1000_LX:
+ return "1G_LX";
+ case AXGBE_SFP_BASE_1000_CX:
+ return "1G_CX";
+ case AXGBE_SFP_BASE_10000_SR:
+ return "10G_SR";
+ case AXGBE_SFP_BASE_10000_LR:
+ return "10G_LR";
+ case AXGBE_SFP_BASE_10000_LRM:
+ return "10G_LRM";
+ case AXGBE_SFP_BASE_10000_ER:
+ return "10G_ER";
+ case AXGBE_SFP_BASE_10000_CR:
+ return "10G_CR";
+ default:
+ return "Unknown";
+ }
+}
+
static void axgbe_phy_sfp_detect(struct axgbe_port *pdata)
{
struct axgbe_phy_data *phy_data = pdata->phy_data;
axgbe_phy_sfp_parse_eeprom(pdata);
axgbe_phy_sfp_external_phy(pdata);
+ PMD_DRV_LOG(DEBUG, "SFP Base: %s\n",
+ axgbe_base_as_string(phy_data->sfp_base));
+
put:
axgbe_phy_sfp_phy_settings(pdata);
axgbe_phy_put_comm_ownership(pdata);
static void axgbe_phy_start_ratechange(struct axgbe_port *pdata)
{
- if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
+ /* Log if a previous command did not complete */
+ if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
+ PMD_DRV_LOG(NOTICE, "firmware mailbox not ready for command\n");
+ else
return;
}
rte_delay_us(1500);
}
+ PMD_DRV_LOG(NOTICE, "firmware mailbox command did not complete\n");
}
static void axgbe_phy_rrc(struct axgbe_port *pdata)
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
axgbe_phy_complete_ratechange(pdata);
+
+ PMD_DRV_LOG(DEBUG, "receiver reset complete\n");
}
static void axgbe_phy_power_off(struct axgbe_port *pdata)
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
axgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = AXGBE_MODE_UNKNOWN;
+
+ PMD_DRV_LOG(DEBUG, "phy powered off\n");
}
static void axgbe_phy_sfi_mode(struct axgbe_port *pdata)
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
axgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = AXGBE_MODE_SFI;
+
+ PMD_DRV_LOG(DEBUG, "10GbE SFI mode set\n");
}
static void axgbe_phy_kr_mode(struct axgbe_port *pdata)
XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
axgbe_phy_complete_ratechange(pdata);
phy_data->cur_mode = AXGBE_MODE_KR;
+
+ PMD_DRV_LOG(DEBUG, "10GbE KR mode set\n");
}
static void axgbe_phy_kx_2500_mode(struct axgbe_port *pdata)