Prerequisites
-------------
-- Requires firmware version **1.25.4.0** and higher. Visit
+- Requires firmware version **1.25.6.0** and higher. Visit
`Chelsio Download Center <http://service.chelsio.com>`_ to get latest firmware
bundled with the latest Chelsio Unified Wire package.
.. code-block:: console
- firmware-version: 1.25.4.0, TP 0.1.23.2
+ firmware-version: 1.25.6.0, TP 0.1.23.2
Running testpmd
~~~~~~~~~~~~~~~
EAL: PCI memory mapped at 0x7fd7c0200000
EAL: PCI memory mapped at 0x7fd77cdfd000
EAL: PCI memory mapped at 0x7fd7c10b7000
- PMD: rte_cxgbe_pmd: fw: 1.25.4.0, TP: 0.1.23.2
+ PMD: rte_cxgbe_pmd: fw: 1.25.6.0, TP: 0.1.23.2
PMD: rte_cxgbe_pmd: Coming up as MASTER: Initializing adapter
Interactive-mode selected
Configuring Port 0 (socket 0)
[...]
EAL: PCI device 0000:02:01.0 on NUMA socket 0
EAL: probe driver: 1425:5803 net_cxgbevf
- PMD: rte_cxgbe_pmd: Firmware version: 1.25.4.0
+ PMD: rte_cxgbe_pmd: Firmware version: 1.25.6.0
PMD: rte_cxgbe_pmd: TP Microcode version: 0.1.23.2
PMD: rte_cxgbe_pmd: Chelsio rev 0
PMD: rte_cxgbe_pmd: No bootstrap loaded
PMD: rte_cxgbe_pmd: 0000:02:01.0 Chelsio rev 0 1G/10GBASE-SFP
EAL: PCI device 0000:02:01.1 on NUMA socket 0
EAL: probe driver: 1425:5803 net_cxgbevf
- PMD: rte_cxgbe_pmd: Firmware version: 1.25.4.0
+ PMD: rte_cxgbe_pmd: Firmware version: 1.25.6.0
PMD: rte_cxgbe_pmd: TP Microcode version: 0.1.23.2
PMD: rte_cxgbe_pmd: Chelsio rev 0
PMD: rte_cxgbe_pmd: No bootstrap loaded
.. code-block:: console
- dev.t5nex.0.firmware_version: 1.25.4.0
+ dev.t5nex.0.firmware_version: 1.25.6.0
Running testpmd
~~~~~~~~~~~~~~~
EAL: PCI memory mapped at 0x8007ec000
EAL: PCI memory mapped at 0x842800000
EAL: PCI memory mapped at 0x80086c000
- PMD: rte_cxgbe_pmd: fw: 1.25.4.0, TP: 0.1.23.2
+ PMD: rte_cxgbe_pmd: fw: 1.25.6.0, TP: 0.1.23.2
PMD: rte_cxgbe_pmd: Coming up as MASTER: Initializing adapter
Interactive-mode selected
Configuring Port 0 (socket 0)
u32 viid_smt_extn_support:1; /* FW returns vin and smt index */
u32 max_tx_coalesce_num; /* Max # of Tx packets that can be coalesced */
u8 vi_enable_rx; /* FW support for enable/disable VI Rx at runtime */
+
+ u16 rawf_start; /* FW supports RAW MAC match-all filters */
+ u16 rawf_size;
};
/* Firmware Port Capabilities types.
FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD = 0x28,
FW_PARAMS_PARAM_DEV_FILTER = 0x2E,
FW_PARAMS_PARAM_DEV_VI_ENABLE_INGRESS_AFTER_LINKUP = 0x32,
+ FW_PARAMS_PARAM_PFVF_RAWF_START = 0x36,
+ FW_PARAMS_PARAM_PFVF_RAWF_END = 0x37,
};
/*
{
struct port_info *pi = eth_dev->data->dev_private;
struct adapter *adapter = pi->adapter;
+ int ret;
+
+ if (adapter->params.rawf_size != 0) {
+ ret = cxgbe_mpstcam_rawf_enable(pi);
+ if (ret < 0)
+ return ret;
+ }
return t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
1, -1, 1, -1, false);
{
struct port_info *pi = eth_dev->data->dev_private;
struct adapter *adapter = pi->adapter;
+ int ret;
+
+ if (adapter->params.rawf_size != 0) {
+ ret = cxgbe_mpstcam_rawf_disable(pi);
+ if (ret < 0)
+ return ret;
+ }
return t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
0, -1, 1, -1, false);
ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params, val);
adap->params.vi_enable_rx = (ret == 0 && val[0] != 0);
+ /* Read the RAW MPS entries. In T6, the last 2 TCAM entries
+ * are reserved for RAW MAC addresses (rawf = 2, one per port).
+ */
+ if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
+ params[0] = CXGBE_FW_PARAM_PFVF(RAWF_START);
+ params[1] = CXGBE_FW_PARAM_PFVF(RAWF_END);
+ ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
+ params, val);
+ if (ret == 0) {
+ adap->params.rawf_start = val[0];
+ adap->params.rawf_size = val[1] - val[0] + 1;
+ }
+ }
+
/*
* The MTU/MSS Table is initialized by now, so load their values. If
* we're initializing the adapter, then we'll make any modifications
return NULL;
for (i = 0; i < t->size; i++) {
- if (entry[i].state == MPS_ENTRY_UNUSED)
+ if (entry[i].state == MPS_ENTRY_UNUSED ||
+ entry[i].state == MPS_ENTRY_RAWF)
continue; /* entry is not being used */
if (match_entry(&entry[i], eth_addr, mask))
return &entry[i];
return -EOPNOTSUPP;
t4_os_write_lock(&t->lock);
entry = &t->entry[idx];
- if (entry->state == MPS_ENTRY_UNUSED) {
+ if (entry->state != MPS_ENTRY_USED) {
t4_os_write_unlock(&t->lock);
return -EINVAL;
}
return ret;
}
+int cxgbe_mpstcam_rawf_enable(struct port_info *pi)
+{
+ struct adapter *adap = pi->adapter;
+ struct mps_tcam_entry *entry;
+ struct mpstcam_table *t;
+ u16 rawf_idx;
+ int ret = 0;
+
+ t = adap->mpstcam;
+ if (adap->params.rawf_size == 0 || t == NULL)
+ return -EOPNOTSUPP;
+
+ t4_os_write_lock(&t->lock);
+ rawf_idx = adap->params.rawf_start + pi->port_id;
+ entry = &t->entry[rawf_idx];
+ if (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) == 1)
+ goto out_unlock;
+
+ ret = t4_alloc_raw_mac_filt(adap, pi->viid, entry->eth_addr,
+ entry->mask, rawf_idx, 0, pi->port_id,
+ false);
+ if (ret < 0)
+ goto out_unlock;
+
+ __atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);
+
+out_unlock:
+ t4_os_write_unlock(&t->lock);
+ return ret;
+}
+
+int cxgbe_mpstcam_rawf_disable(struct port_info *pi)
+{
+ struct adapter *adap = pi->adapter;
+ struct mps_tcam_entry *entry;
+ struct mpstcam_table *t;
+ u16 rawf_idx;
+ int ret = 0;
+
+ t = adap->mpstcam;
+ if (adap->params.rawf_size == 0 || t == NULL)
+ return -EOPNOTSUPP;
+
+ t4_os_write_lock(&t->lock);
+ rawf_idx = adap->params.rawf_start + pi->port_id;
+ entry = &t->entry[rawf_idx];
+ if (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) != 1)
+ goto out_unlock;
+
+ ret = t4_free_raw_mac_filt(adap, pi->viid, entry->eth_addr,
+ entry->mask, rawf_idx, 0, pi->port_id,
+ false);
+ if (ret < 0)
+ goto out_unlock;
+
+ __atomic_store_n(&entry->refcnt, 0, __ATOMIC_RELAXED);
+
+out_unlock:
+ t4_os_write_unlock(&t->lock);
+ return ret;
+}
+
struct mpstcam_table *t4_init_mpstcam(struct adapter *adap)
{
+ u16 size = adap->params.arch.mps_tcam_size;
struct mpstcam_table *t;
int i;
- u16 size = adap->params.arch.mps_tcam_size;
t = t4_os_alloc(sizeof(*t) + size * sizeof(struct mps_tcam_entry));
if (!t)
t->entry[i].idx = i;
}
+ /* RAW MAC entries are reserved for match-all wildcard to
+ * match all promiscuous traffic. So, mark them special.
+ */
+ for (i = 0; i < adap->params.rawf_size; i++)
+ t->entry[adap->params.rawf_start + i].state = MPS_ENTRY_RAWF;
+
/* first entry is used by chip. this is overwritten only
* in t4_cleanup_mpstcam()
*/
* for a specific entry
*/
MPS_ENTRY_USED,
+ MPS_ENTRY_RAWF, /* Reserved for RAW MAC Filters */
};
struct mps_tcam_entry {
int cxgbe_mpstcam_alloc(struct port_info *pi, const u8 *mac, const u8 *mask);
int cxgbe_mpstcam_remove(struct port_info *pi, u16 idx);
int cxgbe_mpstcam_modify(struct port_info *pi, int idx, const u8 *addr);
-
+int cxgbe_mpstcam_rawf_enable(struct port_info *pi);
+int cxgbe_mpstcam_rawf_disable(struct port_info *pi);
#endif /* _CXGBE_MPSTCAM_H_ */