Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
CPU SSE = Y
CPU AVX = Y
CPU AVX2 = Y
+Mbuf scatter gather = Y
;
; Supported crypto algorithms of the 'aesni_gcm' crypto driver.
;
CPU AESNI =
CPU NEON =
CPU ARM CE =
+Mbuf scatter gather =
;
; Supported crypto algorithms of a default crypto driver.
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
+Mbuf scatter gather = Y
;
; Supported crypto algorithms of the 'null' crypto driver.
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
+Mbuf scatter gather = Y
;
; Supported crypto algorithms of the 'openssl' crypto driver.
Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
+Mbuf scatter gather = Y
;
; Supported crypto algorithms of the 'qat' crypto driver.