* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <sys/queue.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_bus_pci.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_io.h>
#ifndef _HNS3_CMD_H_
#define _HNS3_CMD_H_
+#include <stdint.h>
+
#define HNS3_CMDQ_TX_TIMEOUT 30000
#define HNS3_CMDQ_RX_INVLD_B 0
#define HNS3_CMDQ_RX_OUTVLD_B 1
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <inttypes.h>
-#include <stdbool.h>
-#include <string.h>
-#include <unistd.h>
#include <rte_io.h>
-#include <rte_common.h>
#include <rte_ethdev.h>
#include "hns3_logs.h"
-#include "hns3_regs.h"
#include "hns3_ethdev.h"
#include "hns3_dcb.h"
#ifndef _HNS3_DCB_H_
#define _HNS3_DCB_H_
+#include <stdint.h>
+
+#include "hns3_cmd.h"
+
#define HNS3_ETHER_MAX_RATE 100000
/* MAC Pause */
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdarg.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_atomic.h>
+#include <rte_alarm.h>
#include <rte_bus_pci.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
-#include <rte_interrupts.h>
#include <rte_io.h>
-#include <rte_log.h>
#include <rte_pci.h>
#include "hns3_ethdev.h"
hi_thrd = shared_buf - pf->dv_buf_size;
if (tc_num <= NEED_RESERVE_TC_NUM)
- hi_thrd = hi_thrd * BUF_RESERVE_PERCENT
- / BUF_MAX_PERCENT;
+ hi_thrd = hi_thrd * BUF_RESERVE_PERCENT /
+ BUF_MAX_PERCENT;
if (tc_num)
hi_thrd = hi_thrd / tc_num;
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_50GE_RDMA) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_MACSEC) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_200G_RDMA) },
- { .vendor_id = 0, /* sentinel */ },
+ { .vendor_id = 0, }, /* sentinel */
};
static struct rte_pci_driver rte_hns3_pmd = {
#define _HNS3_ETHDEV_H_
#include <sys/time.h>
-#include <rte_alarm.h>
#include <rte_ethdev_driver.h>
#include "hns3_cmd.h"
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
-#define HNS3_DEV_PRIVATE_TO_ADAPTER(adapter) \
- ((struct hns3_adapter *)adapter)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
(&((struct hns3_adapter *)adapter)->pf)
-#define HNS3VF_DEV_PRIVATE_TO_VF(adapter) \
- (&((struct hns3_adapter *)adapter)->vf)
#define HNS3_DEV_HW_TO_ADAPTER(hw) \
container_of(hw, struct hns3_adapter, hw)
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <string.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <arpa/inet.h>
#include <linux/pci_regs.h>
-
#include <rte_alarm.h>
-#include <rte_atomic.h>
-#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
-#include <rte_interrupts.h>
#include <rte_io.h>
-#include <rte_log.h>
#include <rte_pci.h>
#include <rte_vfio.h>
static const struct rte_pci_id pci_id_hns3vf_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_PFC_VF) },
- { .vendor_id = 0, /* sentinel */ },
+ { .vendor_id = 0, }, /* sentinel */
};
static struct rte_pci_driver rte_hns3vf_pmd = {
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
#include <rte_ethdev_driver.h>
#include <rte_hash.h>
#include <rte_hash_crc.h>
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <sys/queue.h>
#include <rte_flow_driver.h>
#include <rte_io.h>
#include <rte_malloc.h>
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <rte_atomic.h>
#include <rte_alarm.h>
#include <rte_cycles.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_pci.h>
-#include <rte_bus_pci.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
#ifndef _HNS3_INTR_H_
#define _HNS3_INTR_H_
+#include <stdint.h>
+
+#include "hns3_ethdev.h"
+
#define HNS3_PPP_MPF_ECC_ERR_INT0_EN 0xFFFFFFFF
#define HNS3_PPP_MPF_ECC_ERR_INT0_EN_MASK 0xFFFFFFFF
#define HNS3_PPP_MPF_ECC_ERR_INT1_EN 0xFFFFFFFF
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
#include <rte_ethdev_driver.h>
#include <rte_io.h>
-#include <rte_spinlock.h>
-#include <rte_pci.h>
-#include <rte_bus_pci.h>
#include "hns3_ethdev.h"
#include "hns3_regs.h"
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-
#include <rte_eal.h>
#include <rte_ethdev_driver.h>
#include <rte_string_fns.h>
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdarg.h>
-#include <stdbool.h>
-#include <string.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_io.h>
-#include <rte_pci.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_memcpy.h>
-#include <rte_spinlock.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdarg.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <unistd.h>
-#include <inttypes.h>
#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
#include <rte_common.h>
#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
#include <rte_vxlan.h>
#include <rte_ethdev_driver.h>
#include <rte_io.h>
-#include <rte_ip.h>
-#include <rte_gre.h>
#include <rte_net.h>
#include <rte_malloc.h>
-#include <rte_pci.h>
#if defined(RTE_ARCH_ARM64) && defined(CC_SVE_SUPPORT)
#include <rte_cpuflags.h>
#endif
#ifndef _HNS3_RXTX_H_
#define _HNS3_RXTX_H_
+#include <stdint.h>
+#include <rte_mbuf_core.h>
+
#define HNS3_MIN_RING_DESC 64
#define HNS3_MAX_RING_DESC 32768
#define HNS3_DEFAULT_RING_DESC 1024
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <stdint.h>
-#include <rte_common.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_spinlock.h>
#include "hns3_ethdev.h"
#include "hns3_rxtx.h"