common/cnxk: support CPT second pass flow rules

Added support to create flow rules to match packets
from CPT's second pass packets. With this change, ingress
rules will be created with bits 10 and 11 of channel field
in the MCAM ignored by default. For rules specific to
second pass packets, the CPT channel bits will be set
in the MCAM.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index 1cc0c8dfb8d2a0daf83b00ae0347bdb3b774423b..5863e358e0233483aeb19143b90ee4e02d6da991 100644 (file)
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -830,7 +830,7 @@
 #define NIX_CHAN_LBKX_CHX(a, b)                                                \
        (0x000ull | ((uint64_t)(a) << 8) | (uint64_t)(b))
 #define NIX_CHAN_CPT_CH_END   (0x4ffull) /* [CN10K, .) */
-#define NIX_CHAN_CPT_CH_START (0x400ull) /* [CN10K, .) */
+#define NIX_CHAN_CPT_CH_START (0x800ull) /* [CN10K, .) */
 #define NIX_CHAN_R4          (0x400ull) /* [CN9K, CN10K) */
 #define NIX_CHAN_R5          (0x500ull)
 #define NIX_CHAN_R6          (0x600ull)
@@ -843,6 +843,11 @@
 #define NIX_CHAN_RPMX_LMACX_CHX(a, b, c)                                       \
        (0x800ull | ((uint64_t)(a) << 8) | ((uint64_t)(b) << 4) | (uint64_t)(c))
 
+/* The mask is to extract lower 10-bits of channel number
+ * which CPT will pass to X2P.
+ */
+#define NIX_CHAN_CPT_X2P_MASK (0x3ffull)
+
 #define NIX_INTF_SDP  (0x4ull)
 #define NIX_INTF_CGX0 (0x0ull) /* [CN9K, CN10K) */
 #define NIX_INTF_CGX1 (0x1ull) /* [CN9K, CN10K) */

diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index fc88fd58bc846a39be4c5445971c99b808331a79..51e36f141f080b7edece07a0cfc22e42b9af44e4 100644 (file)
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -570,10 +570,11 @@ npc_parse_pattern(struct npc *npc, const struct roc_npc_item_info pattern[],
                  struct roc_npc_flow *flow, struct npc_parse_state *pst)
 {
        npc_parse_stage_func_t parse_stage_funcs[] = {
-               npc_parse_meta_items, npc_parse_pre_l2, npc_parse_cpt_hdr,
-               npc_parse_higig2_hdr, npc_parse_la,     npc_parse_lb,
-               npc_parse_lc,         npc_parse_ld,     npc_parse_le,
-               npc_parse_lf,         npc_parse_lg,     npc_parse_lh,
+               npc_parse_meta_items, npc_parse_mark_item,  npc_parse_pre_l2,
+               npc_parse_cpt_hdr,    npc_parse_higig2_hdr, npc_parse_la,
+               npc_parse_lb,         npc_parse_lc,         npc_parse_ld,
+               npc_parse_le,         npc_parse_lf,         npc_parse_lg,
+               npc_parse_lh,
        };
        uint8_t layer = 0;
        int key_offset;

diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index 6204139396e4acb7b172e6569b1615208b4571ad..aecea37b3d45e8825a45f6a90522c95dc164d693 100644 (file)
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -37,6 +37,7 @@ enum roc_npc_item_type {
        ROC_NPC_ITEM_TYPE_L3_CUSTOM,
        ROC_NPC_ITEM_TYPE_QINQ,
        ROC_NPC_ITEM_TYPE_RAW,
+       ROC_NPC_ITEM_TYPE_MARK,
        ROC_NPC_ITEM_TYPE_END,
 };
 

diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
index 9c5ff5e60a88e8cf80fe2139c3adc4fe56011e03..3447b593449abdb9413b1c7030206e10e2b9c405 100644 (file)
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -497,6 +497,38 @@ done:
        return rc;
 }
 
+static void
+npc_mcam_set_channel(struct roc_npc_flow *flow,
+                    struct npc_mcam_write_entry_req *req, uint16_t channel,
+                    uint16_t chan_mask, bool is_second_pass)
+{
+       uint16_t chan = 0, mask = 0;
+
+       req->entry_data.kw[0] &= ~(GENMASK(11, 0));
+       req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
+       flow->mcam_data[0] &= ~(GENMASK(11, 0));
+       flow->mcam_mask[0] &= ~(GENMASK(11, 0));
+
+       if (is_second_pass) {
+               chan = (channel | NIX_CHAN_CPT_CH_START);
+               mask = (chan_mask | NIX_CHAN_CPT_CH_START);
+       } else {
+               /*
+                * Clear bits 10 & 11 corresponding to CPT
+                * channel. By default, rules should match
+                * both first pass packets and second pass
+                * packets from CPT.
+                */
+               chan = (channel & NIX_CHAN_CPT_X2P_MASK);
+               mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
+       }
+
+       req->entry_data.kw[0] |= (uint64_t)chan;
+       req->entry_data.kw_mask[0] |= (uint64_t)mask;
+       flow->mcam_data[0] |= (uint64_t)chan;
+       flow->mcam_mask[0] |= (uint64_t)mask;
+}
+
 int
 npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
                         struct npc_parse_state *pst)
@@ -564,32 +596,22 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
        if (flow->nix_intf == NIX_INTF_RX) {
                if (inl_dev && inl_dev->is_multi_channel &&
                    (flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC)) {
-                       req->entry_data.kw[0] |= (uint64_t)inl_dev->channel;
-                       req->entry_data.kw_mask[0] |=
-                               (uint64_t)inl_dev->chan_mask;
                        pf_func = nix_inl_dev_pffunc_get();
                        req->entry_data.action &= ~(GENMASK(19, 4));
                        req->entry_data.action |= (uint64_t)pf_func << 4;
-
                        flow->npc_action &= ~(GENMASK(19, 4));
                        flow->npc_action |= (uint64_t)pf_func << 4;
-                       flow->mcam_data[0] |= (uint64_t)inl_dev->channel;
-                       flow->mcam_mask[0] |= (uint64_t)inl_dev->chan_mask;
+
+                       npc_mcam_set_channel(flow, req, inl_dev->channel,
+                                            inl_dev->chan_mask, false);
                } else if (npc->is_sdp_link) {
-                       req->entry_data.kw[0] &= ~(GENMASK(11, 0));
-                       req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
-                       req->entry_data.kw[0] |= (uint64_t)npc->sdp_channel;
-                       req->entry_data.kw_mask[0] |=
-                               (uint64_t)npc->sdp_channel_mask;
-                       flow->mcam_data[0] &= ~(GENMASK(11, 0));
-                       flow->mcam_mask[0] &= ~(GENMASK(11, 0));
-                       flow->mcam_data[0] |= (uint64_t)npc->sdp_channel;
-                       flow->mcam_mask[0] |= (uint64_t)npc->sdp_channel_mask;
+                       npc_mcam_set_channel(flow, req, npc->sdp_channel,
+                                            npc->sdp_channel_mask,
+                                            pst->is_second_pass_rule);
                } else {
-                       req->entry_data.kw[0] |= (uint64_t)npc->channel;
-                       req->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1);
-                       flow->mcam_data[0] |= (uint64_t)npc->channel;
-                       flow->mcam_mask[0] |= (BIT_ULL(12) - 1);
+                       npc_mcam_set_channel(flow, req, npc->channel,
+                                            (BIT_ULL(12) - 1),
+                                            pst->is_second_pass_rule);
                }
        } else {
                uint16_t pf_func = (flow->npc_action >> 4) & 0xffff;

diff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c
index b849326a1957baea9d6cba850dcea8bd5c28d7c3..364a846963f62530fa85fa12fefb0528ef35abaa 100644 (file)
--- a/drivers/common/cnxk/roc_npc_parse.c
+++ b/drivers/common/cnxk/roc_npc_parse.c
@@ -21,6 +21,20 @@ npc_parse_meta_items(struct npc_parse_state *pst)
        return 0;
 }
 
+int
+npc_parse_mark_item(struct npc_parse_state *pst)
+{
+       if (pst->pattern->type == ROC_NPC_ITEM_TYPE_MARK) {
+               if (pst->flow->nix_intf != NIX_INTF_RX)
+                       return -EINVAL;
+
+               pst->is_second_pass_rule = true;
+               pst->pattern++;
+       }
+
+       return 0;
+}
+
 static int
 npc_flow_raw_item_prepare(const struct roc_npc_flow_item_raw *raw_spec,
                          const struct roc_npc_flow_item_raw *raw_mask,

diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h
index e78d96e876293146b67dfe6d3c2a4dcaf61e8530..78d6ee844d07f33652786e27f2623e81ea12872a 100644 (file)
--- a/drivers/common/cnxk/roc_npc_priv.h
+++ b/drivers/common/cnxk/roc_npc_priv.h
@@ -189,6 +189,7 @@ struct npc_parse_state {
        /* adjust ltype in MCAM to match at least one vlan */
        bool set_vlan_ltype_mask;
        bool set_ipv6ext_ltype_mask;
+       bool is_second_pass_rule;
 };
 
 enum npc_kpu_parser_flag {
@@ -421,6 +422,7 @@ void npc_get_hw_supp_mask(struct npc_parse_state *pst,
 int npc_parse_item_basic(const struct roc_npc_item_info *item,
                         struct npc_parse_item_info *info);
 int npc_parse_meta_items(struct npc_parse_state *pst);
+int npc_parse_mark_item(struct npc_parse_state *pst);
 int npc_parse_pre_l2(struct npc_parse_state *pst);
 int npc_parse_higig2_hdr(struct npc_parse_state *pst);
 int npc_parse_cpt_hdr(struct npc_parse_state *pst);