net/ixgbe/base: add register definitions for NVM update
authorGuinan Sun <guinanx.sun@intel.com>
Thu, 9 Jul 2020 08:00:32 +0000 (08:00 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Sat, 11 Jul 2020 04:18:53 +0000 (06:18 +0200)
Added additional register for X550 and above device family.

Signed-off-by: Piotr Skajewski <piotrx.skajewski@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
drivers/net/ixgbe/base/ixgbe_type.h

index bc927a3..51cdff3 100644 (file)
@@ -1082,8 +1082,10 @@ struct ixgbe_dmac_config {
 #define IXGBE_HSMC0R           0x15F04
 #define IXGBE_HSMC1R           0x15F08
 #define IXGBE_SWSR             0x15F10
+#define IXGBE_FWRESETCNT       0x15F40
 #define IXGBE_HFDR             0x15FE8
 #define IXGBE_FLEX_MNG         0x15800 /* 0x15800 - 0x15EFC */
+#define IXGBE_FLEX_MNG_PTR(_i) (IXGBE_FLEX_MNG + ((_i) * 4))
 
 #define IXGBE_HICR_EN          0x01  /* Enable bit - RO */
 /* Driver sets this bit when done to put command in RAM */