common/cnxk: add BPHY device init and fini
authorTomasz Duszynski <tduszynski@marvell.com>
Mon, 21 Jun 2021 15:04:32 +0000 (17:04 +0200)
committerThomas Monjalon <thomas@monjalon.net>
Mon, 5 Jul 2021 21:07:33 +0000 (23:07 +0200)
Add support for device init and fini. It merely saves
baseband phy state container in a globally accessible
resource chest.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
drivers/common/cnxk/meson.build
drivers/common/cnxk/roc_api.h
drivers/common/cnxk/roc_bphy.c [new file with mode: 0644]
drivers/common/cnxk/roc_bphy.h [new file with mode: 0644]
drivers/common/cnxk/roc_idev.c
drivers/common/cnxk/roc_idev_priv.h
drivers/common/cnxk/version.map

index 59975fd..946b98f 100644 (file)
@@ -11,6 +11,7 @@ endif
 config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
 deps = ['eal', 'pci', 'bus_pci', 'mbuf']
 sources = files(
+        'roc_bphy.c',
         'roc_bphy_cgx.c',
         'roc_dev.c',
         'roc_idev.c',
index 256d8c6..dd00478 100644 (file)
@@ -50,6 +50,7 @@
 #define PCI_DEVID_CNXK_EP_VF         0xB203
 #define PCI_DEVID_CNXK_RVU_SDP_PF     0xA0f6
 #define PCI_DEVID_CNXK_RVU_SDP_VF     0xA0f7
+#define PCI_DEVID_CNXK_BPHY          0xA089
 
 #define PCI_DEVID_CN9K_CGX  0xA059
 #define PCI_DEVID_CN10K_RPM 0xA060
 /* Baseband phy cgx */
 #include "roc_bphy_cgx.h"
 
+/* Baseband phy */
+#include "roc_bphy.h"
+
 #endif /* _ROC_API_H_ */
diff --git a/drivers/common/cnxk/roc_bphy.c b/drivers/common/cnxk/roc_bphy.c
new file mode 100644 (file)
index 0000000..77606d6
--- /dev/null
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+int
+roc_bphy_dev_init(struct roc_bphy *roc_bphy)
+{
+       struct idev_cfg *idev;
+
+       idev = idev_get_cfg();
+       if (!idev)
+               return -ENODEV;
+
+       if (!roc_bphy || !roc_bphy->pci_dev)
+               return -EINVAL;
+
+       idev->bphy = roc_bphy;
+
+       return 0;
+}
+
+int
+roc_bphy_dev_fini(struct roc_bphy *roc_bphy)
+{
+       struct idev_cfg *idev;
+
+       idev = idev_get_cfg();
+       if (!idev)
+               return -ENODEV;
+
+       if (!roc_bphy)
+               return -EINVAL;
+
+       idev->bphy = NULL;
+
+       return 0;
+}
diff --git a/drivers/common/cnxk/roc_bphy.h b/drivers/common/cnxk/roc_bphy.h
new file mode 100644 (file)
index 0000000..0579c6c
--- /dev/null
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2020 Marvell.
+ */
+
+#ifndef _ROC_BPHY_
+#define _ROC_BPHY_
+
+#include "roc_api.h"
+
+struct roc_bphy {
+       struct plt_pci_device *pci_dev;
+} __plt_cache_aligned;
+
+int __roc_api roc_bphy_dev_init(struct roc_bphy *roc_bphy);
+int __roc_api roc_bphy_dev_fini(struct roc_bphy *roc_bphy);
+
+#endif /* _ROC_BPHY_ */
index 63cc040..4d7b534 100644 (file)
@@ -36,6 +36,7 @@ idev_set_defaults(struct idev_cfg *idev)
        idev->lmt_pf_func = 0;
        idev->lmt_base_addr = 0;
        idev->num_lmtlines = 0;
+       idev->bphy = NULL;
        __atomic_store_n(&idev->npa_refcnt, 0, __ATOMIC_RELEASE);
 }
 
index ff10a90..384f667 100644 (file)
@@ -7,6 +7,7 @@
 
 /* Intra device related functions */
 struct npa_lf;
+struct roc_bphy;
 struct idev_cfg {
        uint16_t sso_pf_func;
        uint16_t npa_pf_func;
@@ -16,6 +17,7 @@ struct idev_cfg {
        uint16_t lmt_pf_func;
        uint16_t num_lmtlines;
        uint64_t lmt_base_addr;
+       struct roc_bphy *bphy;
 };
 
 /* Generic */
index 0ad805d..25083d9 100644 (file)
@@ -20,6 +20,8 @@ INTERNAL {
        roc_bphy_cgx_set_link_state;
        roc_bphy_cgx_start_rxtx;
        roc_bphy_cgx_stop_rxtx;
+       roc_bphy_dev_fini;
+       roc_bphy_dev_init;
        roc_clk_freq_get;
        roc_error_msg_get;
        roc_idev_lmt_base_addr_get;