return 0;
}
+
+int tf_query_sram_resources(struct tf *tfp,
+ struct tf_query_sram_resources_parms *parms)
+{
+ int rc;
+ struct tf_dev_info dev;
+ uint16_t max_types;
+ struct tfp_calloc_parms cparms;
+ struct tf_rm_resc_req_entry *query;
+ enum tf_rm_resc_resv_strategy resv_strategy;
+
+ TF_CHECK_PARMS2(tfp, parms);
+
+ /* This function can be called before open session, filter
+ * out any non-supported device types on the Core side.
+ */
+ if (parms->device_type != TF_DEVICE_TYPE_THOR) {
+ TFP_DRV_LOG(ERR,
+ "Unsupported device type %d\n",
+ parms->device_type);
+ return -ENOTSUP;
+ }
+
+ tf_dev_bind_ops(parms->device_type, &dev);
+
+ if (dev.ops->tf_dev_get_max_types == NULL) {
+ rc = -EOPNOTSUPP;
+ TFP_DRV_LOG(ERR,
+ "%s: Operation not supported, rc:%s\n",
+ tf_dir_2_str(parms->dir),
+ strerror(-rc));
+ return -EOPNOTSUPP;
+ }
+
+ /* Need device max number of elements for the RM QCAPS */
+ rc = dev.ops->tf_dev_get_max_types(tfp, &max_types);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "Get SRAM resc info failed, rc:%s\n",
+ strerror(-rc));
+ return rc;
+ }
+
+ /* Allocate memory for RM QCAPS request */
+ cparms.nitems = max_types;
+ cparms.size = sizeof(struct tf_rm_resc_req_entry);
+ cparms.alignment = 0;
+ rc = tfp_calloc(&cparms);
+ if (rc)
+ return rc;
+
+ query = (struct tf_rm_resc_req_entry *)cparms.mem_va;
+ tfp->bp = parms->bp;
+
+ /* Get Firmware Capabilities */
+ rc = tf_msg_session_resc_qcaps(tfp,
+ &dev,
+ parms->dir,
+ max_types,
+ query,
+ &resv_strategy,
+ &parms->sram_profile);
+ if (rc)
+ return rc;
+
+ if (dev.ops->tf_dev_get_sram_resources == NULL) {
+ rc = -EOPNOTSUPP;
+ TFP_DRV_LOG(ERR,
+ "%s: Operation not supported, rc:%s\n",
+ tf_dir_2_str(parms->dir),
+ strerror(-rc));
+ return -EOPNOTSUPP;
+ }
+
+ rc = dev.ops->tf_dev_get_sram_resources((void *)query,
+ parms->bank_resc_count,
+ &parms->dynamic_sram_capable);
+ if (rc) {
+ TFP_DRV_LOG(ERR,
+ "Get SRAM resc info failed, rc:%s\n",
+ strerror(-rc));
+ return rc;
+ }
+
+ return 0;
+}
TF_WC_TCAM_8_SLICE_PER_ROW = 8,
};
+/**
+ * Bank identifier
+ */
+enum tf_sram_bank_id {
+ TF_SRAM_BANK_ID_0, /**< SRAM Bank 0 id */
+ TF_SRAM_BANK_ID_1, /**< SRAM Bank 1 id */
+ TF_SRAM_BANK_ID_2, /**< SRAM Bank 2 id */
+ TF_SRAM_BANK_ID_3, /**< SRAM Bank 3 id */
+ TF_SRAM_BANK_ID_MAX /**< SRAM Bank index limit */
+};
+
/**
* EEM record AR helper
*
*/
int tf_get_version(struct tf *tfp,
struct tf_get_version_parms *parms);
+
+/**
+ * tf_query_sram_resources parameter definition
+ */
+struct tf_query_sram_resources_parms {
+ /**
+ * [in] device type
+ *
+ * Device type for the session.
+ */
+ enum tf_device_type device_type;
+
+ /**
+ * [in] bp
+ * The pointer to the parent bp struct. This is only used for HWRM
+ * message passing within the portability layer. The type is struct
+ * bnxt.
+ */
+ void *bp;
+
+ /**
+ * [in] Receive or transmit direction
+ */
+ enum tf_dir dir;
+
+ /**
+ * [out] Bank resource count in 8 bytes entry
+ */
+
+ uint32_t bank_resc_count[TF_SRAM_BANK_ID_MAX];
+
+ /**
+ * [out] Dynamic SRAM Enable
+ */
+ bool dynamic_sram_capable;
+
+ /**
+ * [out] SRAM profile
+ */
+ uint8_t sram_profile;
+};
+
+/**
+ * Get SRAM resources information
+ *
+ * Used to retrieve sram bank partition information
+ *
+ * Returns success or failure code.
+ */
+int tf_query_sram_resources(struct tf *tfp,
+ struct tf_query_sram_resources_parms *parms);
+
#endif /* _TF_CORE_H_ */
uint32_t *tcam_caps,
uint32_t *tbl_caps,
uint32_t *em_caps);
+
+ /**
+ * Device specific function that retrieve the sram resource
+ *
+ * [in] query
+ * Point to resources query result
+ *
+ * [out] sram_bank_caps
+ * Pointer to SRAM bank capabilities
+ *
+ * [out] dynamic_sram_capable
+ * Pointer to dynamic sram capable
+ *
+ * Returns
+ * - (0) if successful.
+ * - (-EINVAL) on failure.
+ */
+ int (*tf_dev_get_sram_resources)(void *query,
+ uint32_t *sram_bank_caps,
+ bool *dynamic_sram_capable);
};
/**
.tf_dev_get_global_cfg = NULL,
.tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
.tf_dev_word_align = NULL,
- .tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps
+ .tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps,
+ .tf_dev_get_sram_resources = NULL
};
/**
.tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
.tf_dev_word_align = tf_dev_p4_word_align,
.tf_dev_cfa_key_hash = hcapi_cfa_p4_key_hash,
- .tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps
+ .tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps,
+ .tf_dev_get_sram_resources = NULL
};
return 0;
}
+/**
+ * Device specific function that retrieve the sram resource
+ *
+ * [in] query
+ * Point to resources query result
+ *
+ * [out] sram_bank_caps
+ * Pointer to SRAM bank capabilities
+ *
+ * [out] dynamic_sram_capable
+ * Pointer to dynamic sram capable
+ *
+ * Returns
+ * - (0) if successful.
+ * - (-EINVAL) on failure.
+ */
+static int tf_dev_p58_get_sram_resources(void *q,
+ uint32_t *sram_bank_caps,
+ bool *dynamic_sram_capable)
+{
+ uint32_t i;
+ struct tf_rm_resc_req_entry *query = q;
+
+ for (i = 0; i < CFA_RESOURCE_TYPE_P58_LAST + 1; i++) {
+ switch (query[i].type) {
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_0:
+ sram_bank_caps[0] = query[i].max;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_1:
+ sram_bank_caps[1] = query[i].max;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_2:
+ sram_bank_caps[2] = query[i].max;
+ break;
+ case CFA_RESOURCE_TYPE_P58_SRAM_BANK_3:
+ sram_bank_caps[3] = query[i].max;
+ break;
+ default:
+ break;
+ }
+ }
+
+ *dynamic_sram_capable = false;
+
+ return 0;
+}
+
/**
* Truflow P58 device specific functions
*/
.tf_dev_get_global_cfg = NULL,
.tf_dev_get_mailbox = tf_dev_p58_get_mailbox,
.tf_dev_word_align = NULL,
- .tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps
+ .tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps,
+ .tf_dev_get_sram_resources = tf_dev_p58_get_sram_resources
};
/**
.tf_dev_get_mailbox = tf_dev_p58_get_mailbox,
.tf_dev_word_align = tf_dev_p58_word_align,
.tf_dev_cfa_key_hash = hcapi_cfa_p58_key_hash,
- .tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps
+ .tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps,
+ .tf_dev_get_sram_resources = tf_dev_p58_get_sram_resources
};
enum tf_dir dir,
uint16_t size,
struct tf_rm_resc_req_entry *query,
- enum tf_rm_resc_resv_strategy *resv_strategy)
+ enum tf_rm_resc_resv_strategy *resv_strategy,
+ uint8_t *sram_profile)
{
int rc;
int i;
struct tfp_send_msg_parms parms = { 0 };
struct hwrm_tf_session_resc_qcaps_input req = { 0 };
struct hwrm_tf_session_resc_qcaps_output resp = { 0 };
- uint8_t fw_session_id;
struct tf_msg_dma_buf qcaps_buf = { 0 };
struct tf_rm_resc_req_entry *data;
int dma_size;
- struct tf_session *tfs;
-
- /* Retrieve the session information */
- rc = tf_session_get_session_internal(tfp, &tfs);
- if (rc) {
- TFP_DRV_LOG(ERR,
- "Failed to lookup session, rc:%s\n",
- strerror(-rc));
- return rc;
- }
TF_CHECK_PARMS3(tfp, query, resv_strategy);
- rc = tf_session_get_fw_session_id(tfp, &fw_session_id);
- if (rc) {
- TFP_DRV_LOG(ERR,
- "%s: Unable to lookup FW id, rc:%s\n",
- tf_dir_2_str(dir),
- strerror(-rc));
- return rc;
- }
-
/* Prepare DMA buffer */
dma_size = size * sizeof(struct tf_rm_resc_req_entry);
rc = tf_msg_alloc_dma_buf(&qcaps_buf, dma_size);
return rc;
/* Populate the request */
- req.fw_session_id = tfp_cpu_to_le_32(fw_session_id);
+ req.fw_session_id = 0;
req.flags = tfp_cpu_to_le_16(dir);
req.qcaps_size = size;
req.qcaps_addr = tfp_cpu_to_le_64(qcaps_buf.pa_addr);
*resv_strategy = resp.flags &
HWRM_TF_SESSION_RESC_QCAPS_OUTPUT_FLAGS_SESS_RESV_STRATEGY_MASK;
+ if (sram_profile != NULL)
+ *sram_profile = resp.sram_profile;
+
cleanup:
tf_msg_free_dma_buf(&qcaps_buf);
* [out] resv_strategy
* Pointer to the reservation strategy
*
+ * [out] sram_profile
+ * Pointer to the sram profile
+ *
* Returns:
* 0 on Success else internal Truflow error
*/
enum tf_dir dir,
uint16_t size,
struct tf_rm_resc_req_entry *query,
- enum tf_rm_resc_resv_strategy *resv_strategy);
+ enum tf_rm_resc_resv_strategy *resv_strategy,
+ uint8_t *sram_profile);
/**
* Sends session HW resource allocation request to TF Firmware
parms->dir,
max_types,
query,
- &resv_strategy);
+ &resv_strategy,
+ NULL);
if (rc)
return rc;
#define TF_SRAM_MGR_BLOCK_SZ_BYTES 64
#define TF_SRAM_MGR_MIN_SLICE_BYTES 8
-/**
- * Bank identifier
- */
-enum tf_sram_bank_id {
- TF_SRAM_BANK_ID_0, /**< SRAM Bank 0 id */
- TF_SRAM_BANK_ID_1, /**< SRAM Bank 1 id */
- TF_SRAM_BANK_ID_2, /**< SRAM Bank 2 id */
- TF_SRAM_BANK_ID_3, /**< SRAM Bank 3 id */
- TF_SRAM_BANK_ID_MAX /**< SRAM Bank index limit */
-};
/**
* TF slice size.
git.droids-corp.org / dpdk.git / commitdiff