crypto/cnxk: enable 3DES-CBC secure capability

Patch enables 3DES-CBC secure capability of crypto device.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h
index b75d68118510394fc0cabf6e8a3f9d7bd4789c7b..887002172585ec26a0794f04a5ba1fb364d87cb1 100644 (file)
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -11,7 +11,7 @@
 #include "roc_cpt.h"
 
 #define CNXK_CPT_MAX_CAPS       35
-#define CNXK_SEC_CRYPTO_MAX_CAPS 12
+#define CNXK_SEC_CRYPTO_MAX_CAPS 13
 #define CNXK_SEC_MAX_CAPS       9
 #define CNXK_AE_EC_ID_MAX       8
 /**

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 98b002d93a4f77c8291c03fda375a1cfbda67a3e..ba9eaf232563cccdf83fc4e5a35d09bedeffc252 100644 (file)
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -862,6 +862,29 @@ static const struct rte_cryptodev_capabilities sec_caps_aes[] = {
        },
 };
 
+static const struct rte_cryptodev_capabilities sec_caps_des[] = {
+       {       /* 3DES CBC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
+                               .block_size = 8,
+                               .key_size = {
+                                       .min = 24,
+                                       .max = 24,
+                                       .increment = 0
+                               },
+                               .iv_size = {
+                                       .min = 8,
+                                       .max = 16,
+                                       .increment = 8
+                               }
+                       }, }
+               }, }
+       }
+};
+
 static const struct rte_cryptodev_capabilities sec_caps_sha1_sha2[] = {
        {       /* SHA1 HMAC */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
@@ -1195,6 +1218,7 @@ sec_crypto_caps_populate(struct rte_cryptodev_capabilities cnxk_caps[],
        int cur_pos = 0;
 
        SEC_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, aes);
+       SEC_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, des);
        SEC_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, sha1_sha2);
 
        if (roc_model_is_cn10k())

diff --git a/drivers/crypto/cnxk/cnxk_ipsec.h b/drivers/crypto/cnxk/cnxk_ipsec.h
index 171ea2774e971ef0ff5cbd850a460ef550cbff85..07ab2cf4eea898e453611364b7c2ebcf3641b05b 100644 (file)
--- a/drivers/crypto/cnxk/cnxk_ipsec.h
+++ b/drivers/crypto/cnxk/cnxk_ipsec.h
@@ -36,6 +36,10 @@ ipsec_xform_cipher_verify(struct rte_crypto_sym_xform *crypto_xform)
                return 0;
        }
 
+       if (crypto_xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
+           crypto_xform->cipher.key.length == 24)
+               return 0;
+
        return -ENOTSUP;
 }