raw/ifpga/base: clear pending bit

Every defined bit in FME_ERROR0 is RW1C. Other reserved bits are always
0 when readout and it will plan to be RW1C if needed in future.
So it is safe just write the read back value to clear all the errors.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>

diff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h
index b7151ca..4216128 100644 (file)
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -957,25 +957,24 @@ struct feature_fme_dperf {
 };
 
 struct feature_fme_error0 {
-#define FME_ERROR0_MASK        0xFFUL
 #define FME_ERROR0_MASK_DEFAULT 0x40UL  /* pcode workaround */
        union {
                u64 csr;
                struct {
                        u8  fabric_err:1;       /* Fabric error */
                        u8  fabfifo_overflow:1; /* Fabric fifo overflow */
-                       u8  kticdc_parity_err:2;/* KTI CDC Parity Error */
-                       u8  iommu_parity_err:1; /* IOMMU Parity error */
+                       u8  reserved2:3;
                        /* AFU PF/VF access mismatch detected */
                        u8  afu_acc_mode_err:1;
-                       u8  mbp_err:1;          /* Indicates an MBP event */
+                       u8  reserved6:1;
                        /* PCIE0 CDC Parity Error */
                        u8  pcie0cdc_parity_err:5;
                        /* PCIE1 CDC Parity Error */
                        u8  pcie1cdc_parity_err:5;
                        /* CVL CDC Parity Error */
                        u8  cvlcdc_parity_err:3;
-                       u64 rsvd:44;            /* Reserved */
+                       u8  fpgaseuerr:1;
+                       u64 rsvd:43;            /* Reserved */
                };
        };
 };

diff --git a/drivers/raw/ifpga/base/ifpga_fme_error.c b/drivers/raw/ifpga/base/ifpga_fme_error.c
index 2978c79..be041ec 100644 (file)
--- a/drivers/raw/ifpga/base/ifpga_fme_error.c
+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c
@@ -54,7 +54,7 @@ static int fme_err_set_clear(struct ifpga_fme_hw *fme, u64 val)
        int ret = 0;
 
        spinlock_lock(&fme->lock);
-       writeq(FME_ERROR0_MASK, &fme_err->fme_err_mask);
+       writeq(GENMASK_ULL(63, 0), &fme_err->fme_err_mask);
 
        fme_error0.csr = readq(&fme_err->fme_err);
        if (val != fme_error0.csr) {
@@ -65,7 +65,7 @@ static int fme_err_set_clear(struct ifpga_fme_hw *fme, u64 val)
        fme_first_err.csr = readq(&fme_err->fme_first_err);
        fme_next_err.csr = readq(&fme_err->fme_next_err);
 
-       writeq(fme_error0.csr & FME_ERROR0_MASK, &fme_err->fme_err);
+       writeq(fme_error0.csr, &fme_err->fme_err);
        writeq(fme_first_err.csr & FME_FIRST_ERROR_MASK,
               &fme_err->fme_first_err);
        writeq(fme_next_err.csr & FME_NEXT_ERROR_MASK,

diff --git a/drivers/raw/ifpga/base/opae_osdep.h b/drivers/raw/ifpga/base/opae_osdep.h
index 1596adc..416cef0 100644 (file)
--- a/drivers/raw/ifpga/base/opae_osdep.h
+++ b/drivers/raw/ifpga/base/opae_osdep.h
@@ -32,10 +32,12 @@ struct uuid {
 #ifndef BITS_PER_LONG
 #define BITS_PER_LONG  (__SIZEOF_LONG__ * 8)
 #endif
+#ifndef BITS_PER_LONG_LONG
+#define BITS_PER_LONG_LONG  (__SIZEOF_LONG_LONG__ * 8)
+#endif
 #ifndef BIT
 #define BIT(a) (1UL << (a))
 #endif /* BIT */
-#define U64_C(x) x ## ULL
 #ifndef BIT_ULL
 #define BIT_ULL(a) (1ULL << (a))
 #endif /* BIT_ULL */
@@ -43,7 +45,8 @@ struct uuid {
 #define GENMASK(h, l)  (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 #endif /* GENMASK */
 #ifndef GENMASK_ULL
-#define GENMASK_ULL(h, l) (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l))
+#define GENMASK_ULL(h, l) \
+       (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 #endif /* GENMASK_ULL */
 #endif /* LINUX_MACROS */