common/cnxk: configure reassembly parameters

When reassembly is enabled by application, set corresponding
flags in SA during creation.

Provide ROC API to configure reassembly unit with active and
zombie limits and step size.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c
index d6006d3176cda76b3146eb690b9bc90c4a94db0d..ec808c00334a9c6ed827c016c07a40050cc35125 100644 (file)
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -339,6 +339,16 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
        if (rc)
                return rc;
 
+       /* Default options for pkt_out and pkt_fmt are with
+        * second pass meta and no defrag.
+        */
+       sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
+       sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG;
+       sa->w0.s.pkind = ROC_IE_OT_CPT_PKIND;
+
+       if (ipsec_xfrm->options.ip_reassembly_en)
+               sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG;
+
        /* ESN */
        sa->w2.s.esn_en = !!ipsec_xfrm->options.esn;
        if (ipsec_xfrm->options.udp_encap) {

diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index fb08d3deb221aa054945e43df6cbb4c02b47741b..11ed1577034d92a4e48fc246f5c404e38791bc5c 100644 (file)
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -233,6 +233,29 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool inb_inl_dev, uint32_t spi)
        return (sa_base + ((spi & mask) * sz));
 }
 
+int
+roc_nix_reassembly_configure(uint32_t max_wait_time, uint16_t max_frags)
+{
+       struct idev_cfg *idev = idev_get_cfg();
+       struct roc_cpt *roc_cpt;
+       struct roc_cpt_rxc_time_cfg cfg;
+
+       PLT_SET_USED(max_frags);
+       roc_cpt = idev->cpt;
+       if (!roc_cpt) {
+               plt_err("Cannot support inline inbound, cryptodev not probed");
+               return -ENOTSUP;
+       }
+
+       cfg.step = (max_wait_time * 1000 / ROC_NIX_INL_REAS_ACTIVE_LIMIT);
+       cfg.zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT;
+       cfg.zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD;
+       cfg.active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT;
+       cfg.active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD;
+
+       return roc_cpt_rxc_time_cfg(roc_cpt, &cfg);
+}
+
 int
 roc_nix_inl_inb_init(struct roc_nix *roc_nix)
 {

diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h
index 9475f00f10a82b357787c81508bc14374dcdfd07..1dc58f2da2be6e74a98180e0dbdf87a5e9d75be2 100644 (file)
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -55,6 +55,12 @@
 #define ROC_NIX_INL_MAX_SOFT_EXP_RNGS                                          \
        (PLT_MAX_ETHPORTS * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS)
 
+/* Reassembly configuration */
+#define ROC_NIX_INL_REAS_ACTIVE_LIMIT    0xFFF
+#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10
+#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT    0xFFF
+#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10
+
 static inline struct roc_onf_ipsec_inb_sa *
 roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx)
 {
@@ -166,6 +172,8 @@ struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(void);
 int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix,
                                         uint32_t tag_const, uint8_t tt);
 uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void);
+int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,
+                                       uint16_t max_frags);
 
 /* NIX Inline Outbound API */
 int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);

diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index a56468c6665b39e569ce71f017fb324ccc7cecc6..44adf91776a5445c869f03d6d06bc040f5ddce35 100644 (file)
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -211,6 +211,7 @@ INTERNAL {
        roc_nix_ptp_tx_ena_dis;
        roc_nix_queues_ctx_dump;
        roc_nix_ras_intr_ena_dis;
+       roc_nix_reassembly_configure;
        roc_nix_register_cq_irqs;
        roc_nix_register_queue_irqs;
        roc_nix_rq_dump;