net/sfc/base: move VI window size config to ef10 NIC board

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index e1708ab..20155f8 100644 (file)
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -1161,11 +1161,6 @@ efx_mcdi_get_vector_cfg(
        __out_opt       uint32_t *pf_nvecp,
        __out_opt       uint32_t *vf_nvecp);
 
-extern __checkReturn   efx_rc_t
-ef10_get_vi_window_shift(
-       __in            efx_nic_t *enp,
-       __out           uint32_t *vi_window_shiftp);
-
 extern __checkReturn           efx_rc_t
 ef10_get_privilege_mask(
        __in                    efx_nic_t *enp,

diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 02f1c19..cd871c4 100644 (file)
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1175,6 +1175,37 @@ ef10_get_datapath_caps(
                encp->enc_tunnel_config_udp_entries_max = 0;
        }
 
+       /*
+        * Check if firmware reports the VI window mode.
+        * Medford2 has a variable VI window size (8K, 16K or 64K).
+        * Medford and Huntington have a fixed 8K VI window size.
+        */
+       if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V3_OUT_LEN) {
+               uint8_t mode =
+                   MCDI_OUT_BYTE(req, GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE);
+
+               switch (mode) {
+               case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K:
+                       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
+                       break;
+               case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K:
+                       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_16K;
+                       break;
+               case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K:
+                       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_64K;
+                       break;
+               default:
+                       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_INVALID;
+                       break;
+               }
+       } else if ((enp->en_family == EFX_FAMILY_HUNTINGTON) ||
+                   (enp->en_family == EFX_FAMILY_MEDFORD)) {
+               /* Huntington and Medford have fixed 8K window size */
+               encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
+       } else {
+               encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_INVALID;
+       }
+
        /* Check if firmware supports extended MAC stats. */
        if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V4_OUT_LEN) {
                /* Extended stats buffer supported */
@@ -1207,71 +1238,6 @@ fail1:
        return (rc);
 }
 
-       __checkReturn   efx_rc_t
-ef10_get_vi_window_shift(
-       __in            efx_nic_t *enp,
-       __out           uint32_t *vi_window_shiftp)
-{
-       efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
-                           MC_CMD_GET_CAPABILITIES_V3_OUT_LEN)];
-       uint32_t mode;
-       efx_rc_t rc;
-
-       (void) memset(payload, 0, sizeof (payload));
-       req.emr_cmd = MC_CMD_GET_CAPABILITIES;
-       req.emr_in_buf = payload;
-       req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
-       req.emr_out_buf = payload;
-       req.emr_out_length = MC_CMD_GET_CAPABILITIES_V3_OUT_LEN;
-
-       efx_mcdi_execute_quiet(enp, &req);
-
-       if (req.emr_rc != 0) {
-               rc = req.emr_rc;
-               goto fail1;
-       }
-
-       if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V3_OUT_LEN) {
-               rc = EMSGSIZE;
-               goto fail2;
-       }
-       mode = MCDI_OUT_BYTE(req, GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE);
-
-       switch (mode) {
-       case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K:
-               EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8 * 1024);
-               *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_8K;
-               break;
-
-       case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K:
-               EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_16K == 16 * 1024);
-               *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_16K;
-               break;
-
-       case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K:
-               EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_64K == 64 * 1024);
-               *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_64K;
-               break;
-
-       default:
-               *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_INVALID;
-               rc = EINVAL;
-               goto fail3;
-       }
-
-       return (0);
-
-fail3:
-       EFSYS_PROBE(fail3);
-fail2:
-       EFSYS_PROBE(fail2);
-fail1:
-       EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-       return (rc);
-}
-
 
 #define        EF10_LEGACY_PF_PRIVILEGE_MASK                                   \
        (MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN                     |       \

diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index 14803c5..e39f817 100644 (file)
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -83,16 +83,6 @@ hunt_board_cfg(
        uint32_t bandwidth;
        efx_rc_t rc;
 
-       /* Huntington has a fixed 8Kbyte VI window size */
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP       == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP        == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP          == 8192);
-
-       EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K  == 8192);
-       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
-
        /*
         * Enable firmware workarounds for hardware errata.
         * Expected responses are:

diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index f0353ca..2090990 100644 (file)
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -52,7 +52,6 @@ medford2_board_cfg(
        uint32_t sysclk, dpcpu_clk;
        uint32_t end_padding;
        uint32_t bandwidth;
-       uint32_t vi_window_shift;
        efx_rc_t rc;
 
        /*
@@ -60,14 +59,6 @@ medford2_board_cfg(
         * Parts of this should be shared with Huntington.
         */
 
-       /* Medford2 has a variable VI window size (8K, 16K or 64K) */
-       if ((rc = ef10_get_vi_window_shift(enp, &vi_window_shift)) != 0)
-               goto fail1;
-
-       EFSYS_ASSERT3U(vi_window_shift, <=, EFX_VI_WINDOW_SHIFT_64K);
-       encp->enc_vi_window_shift = vi_window_shift;
-
-
        /*
         * Enable firmware workarounds for hardware errata.
         * Expected responses are:
@@ -108,11 +99,11 @@ medford2_board_cfg(
        else if ((rc == ENOTSUP) || (rc == ENOENT))
                encp->enc_bug61265_workaround = B_FALSE;
        else
-               goto fail2;
+               goto fail1;
 
        /* Get clock frequencies (in MHz). */
        if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
-               goto fail3;
+               goto fail2;
 
        /*
         * The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
@@ -128,7 +119,7 @@ medford2_board_cfg(
        /* Get the RX DMA end padding alignment configuration */
        if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
                if (rc != EACCES)
-                       goto fail4;
+                       goto fail3;
 
                /* Assume largest tail padding size supported by hardware */
                end_padding = 256;
@@ -155,14 +146,12 @@ medford2_board_cfg(
 
        rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
        if (rc != 0)
-               goto fail5;
+               goto fail4;
        encp->enc_required_pcie_bandwidth_mbps = bandwidth;
        encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
 
        return (0);
 
-fail5:
-       EFSYS_PROBE(fail5);
 fail4:
        EFSYS_PROBE(fail4);
 fail3:

diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index 080df54..a8812bb 100644 (file)
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -57,16 +57,6 @@ medford_board_cfg(
         * Parts of this should be shared with Huntington.
         */
 
-       /* Medford has a fixed 8Kbyte VI window size */
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP       == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP        == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP          == 8192);
-
-       EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K  == 8192);
-       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
-
        /*
         * Enable firmware workarounds for hardware errata.
         * Expected responses are: