net/ice/base: update macros
authorQi Zhang <qi.z.zhang@intel.com>
Mon, 25 Mar 2019 05:44:31 +0000 (13:44 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 29 Mar 2019 16:25:31 +0000 (17:25 +0100)
Update macros for metadata and package flags.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
drivers/net/ice/base/ice_common.c
drivers/net/ice/base/ice_flow.h
drivers/net/ice/base/ice_lan_tx_rx.h

index 4085ccc..e0fe06e 100644 (file)
@@ -365,22 +365,22 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
         */
        case ICE_RXDID_FLEX_NIC:
        case ICE_RXDID_FLEX_NIC_2:
-               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,
-                                  ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,
-                                  ICE_RXFLG_FIN, idx++);
+               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
+                                  ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
+                                  ICE_FLG_FIN, idx++);
                /* flex flag 1 is not used for flexi-flag programming, skipping
                 * these four FLG64 bits.
                 */
-               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,
-                                  ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);
-               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,
-                                  ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,
-                                  ICE_RXFLG_EVLAN_x9100, idx++);
-               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,
-                                  ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,
-                                  ICE_RXFLG_TNL0, idx++);
-               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,
-                                  ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);
+               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
+                                  ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
+               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
+                                  ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
+                                  ICE_FLG_EVLAN_x9100, idx++);
+               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
+                                  ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
+                                  ICE_FLG_TNL0, idx++);
+               ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
+                                  ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
                break;
 
        default:
@@ -399,17 +399,17 @@ static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
  */
 static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
 {
-       enum ice_flex_rx_mdid mdid;
+       enum ice_flex_mdid mdid;
 
        switch (prof_id) {
        case ICE_RXDID_FLEX_NIC:
        case ICE_RXDID_FLEX_NIC_2:
-               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);
-               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);
-               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);
+               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
+               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
+               ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
 
                mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
-                       ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;
+                       ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
 
                ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
 
index 265e1ee..3db10cd 100644 (file)
@@ -278,14 +278,23 @@ enum ice_flow_action_type {
        ICE_FLOW_ACT_NOP,
        ICE_FLOW_ACT_ALLOW,
        ICE_FLOW_ACT_DROP,
-       ICE_FLOW_ACT_COUNT,
+       ICE_FLOW_ACT_CNTR_PKT,
        ICE_FLOW_ACT_FWD_VSI,
        ICE_FLOW_ACT_FWD_VSI_LIST,      /* Should be abstracted away */
        ICE_FLOW_ACT_FWD_QUEUE,         /* Can Queues be abstracted away? */
        ICE_FLOW_ACT_FWD_QUEUE_GROUP,   /* Can Queues be abstracted away? */
-       ICE_FLOW_ACTION_PUSH,
-       ICE_FLOW_ACTION_POP,
-       ICE_FLOW_ACTION_MODIFY,
+       ICE_FLOW_ACT_PUSH,
+       ICE_FLOW_ACT_POP,
+       ICE_FLOW_ACT_MODIFY,
+       ICE_FLOW_ACT_CNTR_BYTES,
+       ICE_FLOW_ACT_CNTR_PKT_BYTES,
+       ICE_FLOW_ACT_GENERIC_0,
+       ICE_FLOW_ACT_GENERIC_1,
+       ICE_FLOW_ACT_GENERIC_2,
+       ICE_FLOW_ACT_GENERIC_3,
+       ICE_FLOW_ACT_GENERIC_4,
+       ICE_FLOW_ACT_RPT_FLOW_ID,
+       ICE_FLOW_ACT_BUILD_PROF_IDX,
 };
 
 struct ice_flow_action {
index 4a1ea0c..b1963b5 100644 (file)
@@ -627,39 +627,60 @@ enum ice_flex_opcode {
        ICE_RX_OPC_PROTID
 };
 
-/* Receive Descriptor MDID values */
-enum ice_flex_rx_mdid {
-       ICE_RX_MDID_FLOW_ID_LOWER       = 5,
-       ICE_RX_MDID_FLOW_ID_HIGH,
-       ICE_RX_MDID_DST_VSI             = 13,
-       ICE_RX_MDID_SRC_VSI             = 19,
-       ICE_RX_MDID_HASH_LOW            = 56,
-       ICE_RX_MDID_HASH_HIGH,
-       ICE_RX_MDID_ACL_CTR0            = ICE_RX_MDID_HASH_LOW,
-       ICE_RX_MDID_ACL_CTR1            = ICE_RX_MDID_HASH_HIGH,
-       ICE_RX_MDID_ACL_CTR2            = 59
+/* Receive Descriptor MDID values that access packet flags */
+enum ice_flex_mdid_pkt_flags {
+       ICE_RX_MDID_PKT_FLAGS_15_0      = 20,
+       ICE_RX_MDID_PKT_FLAGS_31_16,
+       ICE_RX_MDID_PKT_FLAGS_47_32,
+       ICE_RX_MDID_PKT_FLAGS_63_48,
+};
+
+/* Generic descriptor MDID values */
+enum ice_flex_mdid {
+       ICE_MDID_GENERIC_WORD_0,
+       ICE_MDID_GENERIC_WORD_1,
+       ICE_MDID_GENERIC_WORD_2,
+       ICE_MDID_GENERIC_WORD_3,
+       ICE_MDID_GENERIC_WORD_4,
+       ICE_MDID_FLOW_ID_LOWER,
+       ICE_MDID_FLOW_ID_HIGH,
+       ICE_MDID_RX_DESCR_PROF_IDX,
+       ICE_MDID_RX_PKT_DROP,
+       ICE_MDID_RX_DST_Q               = 12,
+       ICE_MDID_RX_DST_VSI,
+       ICE_MDID_SRC_VSI                = 19,
+       ICE_MDID_ACL_NOP                = 55,
+       /* Entry 56 */
+       ICE_MDID_RX_HASH_LOW,
+       ICE_MDID_ACL_CNTR_PKT           = ICE_MDID_RX_HASH_LOW,
+       /* Entry 57 */
+       ICE_MDID_RX_HASH_HIGH,
+       ICE_MDID_ACL_CNTR_BYTES         = ICE_MDID_RX_HASH_HIGH,
+       ICE_MDID_ACL_CNTR_PKT_BYTES
 };
 
 /* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */
 #define ICE_RX_FLEX_DESC_MIRROR_M      (0x3F) /* 6-bits */
 
-/* Rx Flag64 packet flag bits */
-enum ice_rx_flg64_bits {
-       ICE_RXFLG_PKT_DSI       = 0,
-       ICE_RXFLG_EVLAN_x8100   = 15,
-       ICE_RXFLG_EVLAN_x9100,
-       ICE_RXFLG_VLAN_x8100,
-       ICE_RXFLG_TNL_MAC       = 22,
-       ICE_RXFLG_TNL_VLAN,
-       ICE_RXFLG_PKT_FRG,
-       ICE_RXFLG_FIN           = 32,
-       ICE_RXFLG_SYN,
-       ICE_RXFLG_RST,
-       ICE_RXFLG_TNL0          = 38,
-       ICE_RXFLG_TNL1,
-       ICE_RXFLG_TNL2,
-       ICE_RXFLG_UDP_GRE,
-       ICE_RXFLG_RSVD          = 63
+/* Rx/Tx Flag64 packet flag bits */
+enum ice_flg64_bits {
+       ICE_FLG_PKT_DSI         = 0,
+       /* If there is a 1 in this bit position then that means Rx packet */
+       ICE_FLG_PKT_DIR         = 4,
+       ICE_FLG_EVLAN_x8100     = 15,
+       ICE_FLG_EVLAN_x9100,
+       ICE_FLG_VLAN_x8100,
+       ICE_FLG_TNL_MAC         = 22,
+       ICE_FLG_TNL_VLAN,
+       ICE_FLG_PKT_FRG,
+       ICE_FLG_FIN             = 32,
+       ICE_FLG_SYN,
+       ICE_FLG_RST,
+       ICE_FLG_TNL0            = 38,
+       ICE_FLG_TNL1,
+       ICE_FLG_TNL2,
+       ICE_FLG_UDP_GRE,
+       ICE_FLG_RSVD            = 63
 };
 
 enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */