e1000/base: support different EEARBC for i210

EEARBC has changed on i210. It means EEARBC has a different address on
i210 than on other NICs. So, add a new entity named EEARBC_I210 to the
register list and make sure the right one is being used on i210.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 23f9347..277331c 100644 (file)
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -925,7 +925,7 @@ s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
 STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 {
        s32 ret_val;
-       u32 wuc, mdicnfg, ctrl_ext, reg_val;
+       u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;
        u16 nvm_word, phy_word, pci_word, tmp_nvm;
        int i;
 
@@ -942,9 +942,9 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
                nvm_word = E1000_INVM_DEFAULT_AL;
        tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL;
        for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
-               /* check current state */
-               hw->phy.ops.read_reg(hw, (E1000_PHY_PLL_FREQ_PAGE |
-                                    E1000_PHY_PLL_FREQ_REG), &phy_word);
+               /* check current state directly from internal PHY */
+               e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
+                                        E1000_PHY_PLL_FREQ_REG), &phy_word);
                if ((phy_word & E1000_PHY_PLL_UNCONF)
                    != E1000_PHY_PLL_UNCONF) {
                        ret_val = E1000_SUCCESS;
@@ -952,14 +952,17 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
                } else {
                        ret_val = -E1000_ERR_PHY;
                }
-               hw->phy.ops.reset(hw);
+               /* directly reset the internal PHY */
+               ctrl = E1000_READ_REG(hw, E1000_CTRL);
+               E1000_WRITE_REG(hw, E1000_CTRL, ctrl|E1000_CTRL_PHY_RST);
+
                ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
                ctrl_ext |= (E1000_CTRL_EXT_PHYPDEN | E1000_CTRL_EXT_SDLPE);
                E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
 
                E1000_WRITE_REG(hw, E1000_WUC, 0);
                reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16);
-               E1000_WRITE_REG(hw, E1000_EEARBC, reg_val);
+               E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
 
                e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
                pci_word |= E1000_PCI_PMCSR_D3;
@@ -968,7 +971,7 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
                pci_word &= ~E1000_PCI_PMCSR_D3;
                e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
                reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16);
-               E1000_WRITE_REG(hw, E1000_EEARBC, reg_val);
+               E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
 
                /* restore WUC register */
                E1000_WRITE_REG(hw, E1000_WUC, wuc);

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 52ffa51..84531a9 100644 (file)
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -112,6 +112,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
 #define E1000_EEMNGCTL_I210    0x01010  /* i210 MNG EEprom Mode Control */
 #define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */
+#define E1000_EEARBC_I210      0x12024 /* EEPROM Auto Read Bus Control */
 #define E1000_FLASHT   0x01028  /* FLASH Timer Register */
 #define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
 #define E1000_FLSWCTL  0x01030  /* FLASH control register */