net/bnxt: set ring coalesce parameters for Stratus NIC
authorAjit Khaparde <ajit.khaparde@broadcom.com>
Thu, 28 Jun 2018 20:15:32 +0000 (13:15 -0700)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 2 Jul 2018 23:35:58 +0000 (01:35 +0200)
Set ring coalesce parameters for Stratus NIC.
Other skews don't necessarily need this.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
drivers/net/bnxt/bnxt.h
drivers/net/bnxt/bnxt_ethdev.c
drivers/net/bnxt/bnxt_hwrm.c
drivers/net/bnxt/bnxt_hwrm.h
drivers/net/bnxt/bnxt_ring.c

index 9a70617..1a74609 100644 (file)
 #define BNXT_MAX_TX_RING_DESC  4096
 #define BNXT_MAX_RX_RING_DESC  8192
 
+#define BNXT_INT_LAT_TMR_MIN                   75
+#define BNXT_INT_LAT_TMR_MAX                   150
+#define BNXT_NUM_CMPL_AGGR_INT                 36
+#define BNXT_CMPL_AGGR_DMA_TMR                 37
+#define BNXT_NUM_CMPL_DMA_AGGR                 36
+#define BNXT_CMPL_AGGR_DMA_TMR_DURING_INT      50
+#define BNXT_NUM_CMPL_DMA_AGGR_DURING_INT      12
+
 struct bnxt_led_info {
        uint8_t      led_id;
        uint8_t      led_type;
@@ -209,6 +217,16 @@ struct bnxt_ptp_cfg {
        uint32_t                        tx_mapped_regs[BNXT_PTP_TX_REGS];
 };
 
+struct bnxt_coal {
+       uint16_t                        num_cmpl_aggr_int;
+       uint16_t                        num_cmpl_dma_aggr;
+       uint16_t                        num_cmpl_dma_aggr_during_int;
+       uint16_t                        int_lat_tmr_max;
+       uint16_t                        int_lat_tmr_min;
+       uint16_t                        cmpl_aggr_dma_tmr;
+       uint16_t                        cmpl_aggr_dma_tmr_during_int;
+};
+
 #define BNXT_HWRM_SHORT_REQ_LEN                sizeof(struct hwrm_short_input)
 struct bnxt {
        void                            *bar0;
@@ -315,6 +333,7 @@ int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 
 bool is_bnxt_supported(struct rte_eth_dev *dev);
+bool bnxt_stratus_device(struct bnxt *bp);
 extern const struct rte_flow_ops bnxt_flow_ops;
 
 extern int bnxt_logtype_driver;
index 78eaf3b..54b92bb 100644 (file)
@@ -3074,6 +3074,17 @@ static bool bnxt_vf_pciid(uint16_t id)
        return false;
 }
 
+bool bnxt_stratus_device(struct bnxt *bp)
+{
+       uint16_t id = bp->pdev->id.device_id;
+
+       if (id == BROADCOM_DEV_ID_STRATUS_NIC ||
+           id == BROADCOM_DEV_ID_STRATUS_NIC_VF1 ||
+           id == BROADCOM_DEV_ID_STRATUS_NIC_VF2)
+               return true;
+       return false;
+}
+
 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
 {
        struct bnxt *bp = eth_dev->data->dev_private;
index f441d46..707ee62 100644 (file)
@@ -3835,3 +3835,54 @@ int bnxt_vnic_rss_configure(struct bnxt *bp, struct bnxt_vnic_info *vnic)
        }
        return 0;
 }
+
+static void bnxt_hwrm_set_coal_params(struct bnxt_coal *hw_coal,
+       struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *req)
+{
+       uint16_t flags;
+
+       req->num_cmpl_aggr_int = rte_cpu_to_le_16(hw_coal->num_cmpl_aggr_int);
+
+       /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
+       req->num_cmpl_dma_aggr = rte_cpu_to_le_16(hw_coal->num_cmpl_dma_aggr);
+
+       /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
+       req->num_cmpl_dma_aggr_during_int =
+               rte_cpu_to_le_16(hw_coal->num_cmpl_dma_aggr_during_int);
+
+       req->int_lat_tmr_max = rte_cpu_to_le_16(hw_coal->int_lat_tmr_max);
+
+       /* min timer set to 1/2 of interrupt timer */
+       req->int_lat_tmr_min = rte_cpu_to_le_16(hw_coal->int_lat_tmr_min);
+
+       /* buf timer set to 1/4 of interrupt timer */
+       req->cmpl_aggr_dma_tmr = rte_cpu_to_le_16(hw_coal->cmpl_aggr_dma_tmr);
+
+       req->cmpl_aggr_dma_tmr_during_int =
+               rte_cpu_to_le_16(hw_coal->cmpl_aggr_dma_tmr_during_int);
+
+       flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET |
+               HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE;
+       req->flags = rte_cpu_to_le_16(flags);
+}
+
+int bnxt_hwrm_set_ring_coal(struct bnxt *bp,
+                       struct bnxt_coal *coal, uint16_t ring_id)
+{
+       struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req = {0};
+       struct hwrm_ring_cmpl_ring_cfg_aggint_params_output *resp =
+                                               bp->hwrm_cmd_resp_addr;
+       int rc;
+
+       /* Set ring coalesce parameters only for Stratus 100G NIC */
+       if (!bnxt_stratus_device(bp))
+               return 0;
+
+       HWRM_PREP(req, RING_CMPL_RING_CFG_AGGINT_PARAMS);
+       bnxt_hwrm_set_coal_params(coal, &req);
+       req.ring_id = rte_cpu_to_le_16(ring_id);
+       rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
+       HWRM_CHECK_RESULT();
+       HWRM_UNLOCK();
+       return 0;
+}
index 60a4ab1..b83aab3 100644 (file)
@@ -167,4 +167,6 @@ int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type,
 int bnxt_hwrm_ptp_cfg(struct bnxt *bp);
 int bnxt_vnic_rss_configure(struct bnxt *bp,
                            struct bnxt_vnic_info *vnic);
+int bnxt_hwrm_set_ring_coal(struct bnxt *bp,
+                       struct bnxt_coal *coal, uint16_t ring_id);
 #endif
index bb9f6d1..81eb89d 100644 (file)
@@ -258,6 +258,24 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
        return 0;
 }
 
+static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
+{
+       /* Tick values in micro seconds.
+        * 1 coal_buf x bufs_per_record = 1 completion record.
+        */
+       coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
+       /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
+       coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
+       /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
+       coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
+       coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
+       /* min timer set to 1/2 of interrupt timer */
+       coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
+       /* buf timer set to 1/4 of interrupt timer */
+       coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
+       coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
+}
+
 /* ring_grp usage:
  * [0] = default completion ring
  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
@@ -265,9 +283,12 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
  */
 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 {
+       struct bnxt_coal coal;
        unsigned int i;
        int rc = 0;
 
+       bnxt_init_dflt_coal(&coal);
+
        for (i = 0; i < bp->rx_cp_nr_rings; i++) {
                struct bnxt_rx_queue *rxq = bp->rx_queues[i];
                struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
@@ -291,6 +312,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)
                cpr->cp_doorbell = (char *)bp->doorbell_base + i * 0x80;
                bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
                B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
+               bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 
                if (!i) {
                        /*
@@ -379,6 +401,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 
                txr->tx_doorbell = (char *)bp->doorbell_base + idx * 0x80;
                txq->index = idx;
+               bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
        }
 
 err_out: