examples: time fixes

Signed-off-by: Intel

diff --git a/examples/dpdk_qat/main.c b/examples/dpdk_qat/main.c
index f4c388c..ae8438b 100644 (file)
--- a/examples/dpdk_qat/main.c
+++ b/examples/dpdk_qat/main.c
@@ -96,7 +96,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 #define TX_QUEUE_FLUSH_MASK 0xFFFFFFFF
 #define TSC_COUNT_LIMIT 1000
@@ -327,6 +327,7 @@ main_loop(__attribute__((unused)) void *dummy)
 {
        uint32_t lcoreid;
        struct lcore_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
 
        lcoreid = rte_lcore_id();
        qconf = &lcore_conf[lcoreid];
@@ -346,7 +347,7 @@ main_loop(__attribute__((unused)) void *dummy)
                        tsc = rte_rdtsc();
 
                        diff_tsc = tsc - qconf->tsc;
-                       if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+                       if (unlikely(diff_tsc > drain_tsc)) {
                                nic_tx_flush_queues(qconf);
                                crypto_flush_tx_queue(lcoreid);
                                qconf->tsc = tsc;

diff --git a/examples/ipv4_frag/main.c b/examples/ipv4_frag/main.c
index 8f44930..145b128 100644 (file)
--- a/examples/ipv4_frag/main.c
+++ b/examples/ipv4_frag/main.c
@@ -111,7 +111,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST  32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 /* Configure how many packets ahead to prefetch, when reading packets */
 #define PREFETCH_OFFSET        3
@@ -309,11 +309,13 @@ main_loop(__attribute__((unused)) void *dummy)
 {
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        unsigned lcore_id;
-       uint64_t prev_tsc = 0;
-       uint64_t diff_tsc, cur_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc;
        int i, j, nb_rx;
        uint8_t portid;
        struct lcore_queue_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
+
+       prev_tsc = 0;
 
        lcore_id = rte_lcore_id();
        qconf = &lcore_queue_conf[lcore_id];
@@ -340,7 +342,7 @@ main_loop(__attribute__((unused)) void *dummy)
                 * TX burst queue drain
                 */
                diff_tsc = cur_tsc - prev_tsc;
-               if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+               if (unlikely(diff_tsc > drain_tsc)) {
 
                        /*
                         * This could be optimized (use queueid instead of

diff --git a/examples/ipv4_multicast/main.c b/examples/ipv4_multicast/main.c
index 6201978..3b91011 100644 (file)
--- a/examples/ipv4_multicast/main.c
+++ b/examples/ipv4_multicast/main.c
@@ -113,7 +113,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 /* Configure how many packets ahead to prefetch, when reading packets */
 #define PREFETCH_OFFSET        3
@@ -450,9 +450,10 @@ send_timeout_burst(struct lcore_queue_conf *qconf)
 {
        uint64_t cur_tsc;
        uint8_t portid;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
 
        cur_tsc = rte_rdtsc();
-       if (likely (cur_tsc < qconf->tx_tsc + BURST_TX_DRAIN))
+       if (likely (cur_tsc < qconf->tx_tsc + drain_tsc))
                return;
 
        for (portid = 0; portid < MAX_PORTS; portid++) {

diff --git a/examples/l2fwd/main.c b/examples/l2fwd/main.c
index 593aefd..e825a64 100644 (file)
--- a/examples/l2fwd/main.c
+++ b/examples/l2fwd/main.c
@@ -98,7 +98,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 /*
  * Configurable number of RX/TX ring descriptors
@@ -300,11 +300,12 @@ l2fwd_main_loop(void)
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        struct rte_mbuf *m;
        unsigned lcore_id;
-       uint64_t prev_tsc = 0;
-       uint64_t diff_tsc, cur_tsc, timer_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc, timer_tsc;
        unsigned i, j, portid, nb_rx;
        struct lcore_queue_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
 
+       prev_tsc = 0;
        timer_tsc = 0;
 
        lcore_id = rte_lcore_id();
@@ -332,7 +333,7 @@ l2fwd_main_loop(void)
                 * TX burst queue drain
                 */
                diff_tsc = cur_tsc - prev_tsc;
-               if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+               if (unlikely(diff_tsc > drain_tsc)) {
 
                        for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
                                if (qconf->tx_mbufs[portid].len == 0)

diff --git a/examples/l3fwd-vf/main.c b/examples/l3fwd-vf/main.c
index d1f8c98..22bc388 100644 (file)
--- a/examples/l3fwd-vf/main.c
+++ b/examples/l3fwd-vf/main.c
@@ -117,7 +117,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 #define NB_SOCKETS 8
 
@@ -500,11 +500,13 @@ main_loop(__attribute__((unused)) void *dummy)
 {
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        unsigned lcore_id;
-       uint64_t prev_tsc = 0;
-       uint64_t diff_tsc, cur_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc;
        int i, j, nb_rx;
        uint8_t portid, queueid;
        struct lcore_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
+
+       prev_tsc = 0;
 
        lcore_id = rte_lcore_id();
        qconf = &lcore_conf[lcore_id];
@@ -532,7 +534,7 @@ main_loop(__attribute__((unused)) void *dummy)
                 * TX burst queue drain
                 */
                diff_tsc = cur_tsc - prev_tsc;
-               if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+               if (unlikely(diff_tsc > drain_tsc)) {
 
                        /*
                         * This could be optimized (use queueid instead of

diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c
index e6253e3..a6c0432 100755 (executable)
--- a/examples/l3fwd/main.c
+++ b/examples/l3fwd/main.c
@@ -146,7 +146,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 #define NB_SOCKETS 8
 
@@ -650,11 +650,13 @@ main_loop(__attribute__((unused)) void *dummy)
 {
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        unsigned lcore_id;
-       uint64_t prev_tsc = 0;
-       uint64_t diff_tsc, cur_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc;
        int i, j, nb_rx;
        uint8_t portid, queueid;
        struct lcore_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
+
+       prev_tsc = 0;
 
        lcore_id = rte_lcore_id();
        qconf = &lcore_conf[lcore_id];
@@ -682,7 +684,7 @@ main_loop(__attribute__((unused)) void *dummy)
                 * TX burst queue drain
                 */
                diff_tsc = cur_tsc - prev_tsc;
-               if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+               if (unlikely(diff_tsc > drain_tsc)) {
 
                        /*
                         * This could be optimized (use queueid instead of

diff --git a/examples/link_status_interrupt/main.c b/examples/link_status_interrupt/main.c
index 3b85399..c513a1e 100644 (file)
--- a/examples/link_status_interrupt/main.c
+++ b/examples/link_status_interrupt/main.c
@@ -99,7 +99,7 @@
 #define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */
 
 #define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
 
 /*
  * Configurable number of RX/TX ring descriptors
@@ -317,11 +317,12 @@ lsi_main_loop(void)
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        struct rte_mbuf *m;
        unsigned lcore_id;
-       uint64_t prev_tsc = 0;
-       uint64_t diff_tsc, cur_tsc, timer_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc, timer_tsc;
        unsigned i, j, portid, nb_rx;
        struct lcore_queue_conf *qconf;
+       const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
 
+       prev_tsc = 0;
        timer_tsc = 0;
 
        lcore_id = rte_lcore_id();
@@ -349,7 +350,7 @@ lsi_main_loop(void)
                 * TX burst queue drain
                 */
                diff_tsc = cur_tsc - prev_tsc;
-               if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
+               if (unlikely(diff_tsc > drain_tsc)) {
 
                        /* this could be optimized (use queueid instead of
                         * portid), but it is not called so often */