net/mlx5: move Rx CQ creation to common
authorMichael Baum <michaelba@nvidia.com>
Wed, 6 Jan 2021 08:19:32 +0000 (08:19 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 14 Jan 2021 09:12:36 +0000 (10:12 +0100)
Using common function for Rx CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
drivers/net/mlx5/mlx5.c
drivers/net/mlx5/mlx5.h
drivers/net/mlx5/mlx5_devx.c
drivers/net/mlx5/mlx5_rxtx.h

index 1afad04..e245276 100644 (file)
@@ -936,14 +936,6 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
                goto error;
        }
        if (sh->devx) {
-               /* Query the EQN for this core. */
-               err = mlx5_glue->devx_query_eqn(sh->ctx, 0, &sh->eqn);
-               if (err) {
-                       rte_errno = errno;
-                       DRV_LOG(ERR, "Failed to query event queue number %d.",
-                               rte_errno);
-                       goto error;
-               }
                err = mlx5_os_get_pdn(sh->pd, &sh->pdn);
                if (err) {
                        DRV_LOG(ERR, "Fail to extract pdn from PD");
index e61154b..079cbca 100644 (file)
@@ -683,7 +683,6 @@ struct mlx5_dev_ctx_shared {
        uint16_t bond_dev; /* Bond primary device id. */
        uint32_t devx:1; /* Opened with DV. */
        uint32_t flow_hit_aso_en:1; /* Flow Hit ASO is supported. */
-       uint32_t eqn; /* Event Queue number. */
        uint32_t max_port; /* Maximal IB device port index. */
        void *ctx; /* Verbs/DV/DevX context. */
        void *pd; /* Protection Domain. */
@@ -791,7 +790,7 @@ struct mlx5_rxq_obj {
                };
                struct {
                        struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */
-                       struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */
+                       struct mlx5_devx_cq cq_obj; /* DevX CQ object. */
                        void *devx_channel;
                };
        };
index af0383c..913f169 100644 (file)
@@ -172,30 +172,17 @@ mlx5_rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
 }
 
 /**
- * Release the resources allocated for the Rx CQ DevX object.
+ * Destroy the Rx queue DevX object.
  *
- * @param rxq_ctrl
- *   DevX Rx queue object.
+ * @param rxq_obj
+ *   Rxq object to destroy.
  */
 static void
-mlx5_rxq_release_devx_cq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
+mlx5_rxq_release_devx_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
 {
-       struct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->cq_dbrec_page;
-
-       if (rxq_ctrl->cq_umem) {
-               mlx5_os_umem_dereg(rxq_ctrl->cq_umem);
-               rxq_ctrl->cq_umem = NULL;
-       }
-       if (rxq_ctrl->rxq.cqes) {
-               rte_free((void *)(uintptr_t)rxq_ctrl->rxq.cqes);
-               rxq_ctrl->rxq.cqes = NULL;
-       }
-       if (dbr_page) {
-               claim_zero(mlx5_release_dbr(&rxq_ctrl->priv->dbrpgs,
-                                           mlx5_os_get_umem_id(dbr_page->umem),
-                                           rxq_ctrl->cq_dbr_offset));
-               rxq_ctrl->cq_dbrec_page = NULL;
-       }
+       mlx5_rxq_release_devx_rq_resources(rxq_ctrl);
+       mlx5_devx_cq_destroy(&rxq_ctrl->obj->cq_obj);
+       memset(&rxq_ctrl->obj->cq_obj, 0, sizeof(rxq_ctrl->obj->cq_obj));
 }
 
 /**
@@ -213,14 +200,12 @@ mlx5_rxq_devx_obj_release(struct mlx5_rxq_obj *rxq_obj)
                mlx5_devx_modify_rq(rxq_obj, MLX5_RXQ_MOD_RDY2RST);
                claim_zero(mlx5_devx_cmd_destroy(rxq_obj->rq));
        } else {
-               MLX5_ASSERT(rxq_obj->devx_cq);
+               MLX5_ASSERT(rxq_obj->cq_obj);
                claim_zero(mlx5_devx_cmd_destroy(rxq_obj->rq));
-               claim_zero(mlx5_devx_cmd_destroy(rxq_obj->devx_cq));
                if (rxq_obj->devx_channel)
                        mlx5_os_devx_destroy_event_channel
                                                        (rxq_obj->devx_channel);
-               mlx5_rxq_release_devx_rq_resources(rxq_obj->rxq_ctrl);
-               mlx5_rxq_release_devx_cq_resources(rxq_obj->rxq_ctrl);
+               mlx5_rxq_release_devx_resources(rxq_obj->rxq_ctrl);
        }
 }
 
@@ -249,7 +234,7 @@ mlx5_rx_devx_get_event(struct mlx5_rxq_obj *rxq_obj)
                rte_errno = errno;
                return -rte_errno;
        }
-       if (out.event_resp.cookie != (uint64_t)(uintptr_t)rxq_obj->devx_cq) {
+       if (out.event_resp.cookie != (uint64_t)(uintptr_t)rxq_obj->cq_obj.cq) {
                rte_errno = EINVAL;
                return -rte_errno;
        }
@@ -327,7 +312,7 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
                container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
        struct mlx5_devx_create_rq_attr rq_attr = { 0 };
        uint32_t wqe_n = 1 << (rxq_data->elts_n - rxq_data->sges_n);
-       uint32_t cqn = rxq_ctrl->obj->devx_cq->id;
+       uint32_t cqn = rxq_ctrl->obj->cq_obj.cq->id;
        struct mlx5_devx_dbr_page *dbr_page;
        int64_t dbr_offset;
        uint32_t wq_size = 0;
@@ -410,31 +395,23 @@ error:
  *   Queue index in DPDK Rx queue array.
  *
  * @return
- *   The DevX CQ object initialized, NULL otherwise and rte_errno is set.
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static struct mlx5_devx_obj *
+static int
 mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct mlx5_devx_obj *cq_obj = 0;
+       struct mlx5_devx_cq *cq_obj = 0;
        struct mlx5_devx_cq_attr cq_attr = { 0 };
        struct mlx5_priv *priv = dev->data->dev_private;
+       struct mlx5_dev_ctx_shared *sh = priv->sh;
        struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
        struct mlx5_rxq_ctrl *rxq_ctrl =
                container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
-       size_t page_size = rte_mem_page_size();
        unsigned int cqe_n = mlx5_rxq_cqe_num(rxq_data);
-       struct mlx5_devx_dbr_page *dbr_page;
-       int64_t dbr_offset;
-       void *buf = NULL;
-       uint16_t event_nums[1] = {0};
        uint32_t log_cqe_n;
-       uint32_t cq_size;
+       uint16_t event_nums[1] = { 0 };
        int ret = 0;
 
-       if (page_size == (size_t)-1) {
-               DRV_LOG(ERR, "Failed to get page_size.");
-               goto error;
-       }
        if (priv->config.cqe_comp && !rxq_data->hw_timestamp &&
            !rxq_data->lro) {
                cq_attr.cqe_comp_en = 1u;
@@ -487,71 +464,37 @@ mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
                        "Port %u Rx CQE compression is disabled for LRO.",
                        dev->data->port_id);
        }
+       cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->devx_rx_uar);
        log_cqe_n = log2above(cqe_n);
-       cq_size = sizeof(struct mlx5_cqe) * (1 << log_cqe_n);
-       buf = rte_calloc_socket(__func__, 1, cq_size, page_size,
-                               rxq_ctrl->socket);
-       if (!buf) {
-               DRV_LOG(ERR, "Failed to allocate memory for CQ.");
-               goto error;
-       }
-       rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)buf;
-       rxq_ctrl->cq_umem = mlx5_os_umem_reg(priv->sh->ctx, buf,
-                                                    cq_size,
-                                                    IBV_ACCESS_LOCAL_WRITE);
-       if (!rxq_ctrl->cq_umem) {
-               DRV_LOG(ERR, "Failed to register umem for CQ.");
-               goto error;
-       }
-       /* Allocate CQ door-bell. */
-       dbr_offset = mlx5_get_dbr(priv->sh->ctx, &priv->dbrpgs, &dbr_page);
-       if (dbr_offset < 0) {
-               DRV_LOG(ERR, "Failed to allocate CQ door-bell.");
-               goto error;
-       }
-       rxq_ctrl->cq_dbr_offset = dbr_offset;
-       rxq_ctrl->cq_dbrec_page = dbr_page;
-       rxq_data->cq_db = (uint32_t *)((uintptr_t)dbr_page->dbrs +
-                         (uintptr_t)rxq_ctrl->cq_dbr_offset);
-       rxq_data->cq_uar =
-                       mlx5_os_get_devx_uar_base_addr(priv->sh->devx_rx_uar);
        /* Create CQ using DevX API. */
-       cq_attr.eqn = priv->sh->eqn;
-       cq_attr.uar_page_id =
-                       mlx5_os_get_devx_uar_page_id(priv->sh->devx_rx_uar);
-       cq_attr.q_umem_id = mlx5_os_get_umem_id(rxq_ctrl->cq_umem);
-       cq_attr.q_umem_valid = 1;
-       cq_attr.log_cq_size = log_cqe_n;
-       cq_attr.log_page_size = rte_log2_u32(page_size);
-       cq_attr.db_umem_offset = rxq_ctrl->cq_dbr_offset;
-       cq_attr.db_umem_id = mlx5_os_get_umem_id(dbr_page->umem);
-       cq_attr.db_umem_valid = 1;
-       cq_obj = mlx5_devx_cmd_create_cq(priv->sh->ctx, &cq_attr);
-       if (!cq_obj)
-               goto error;
+       ret = mlx5_devx_cq_create(sh->ctx, &rxq_ctrl->obj->cq_obj, log_cqe_n,
+                                 &cq_attr, sh->numa_node);
+       if (ret)
+               return ret;
+       cq_obj = &rxq_ctrl->obj->cq_obj;
+       rxq_data->cqes = (volatile struct mlx5_cqe (*)[])
+                                                       (uintptr_t)cq_obj->cqes;
+       rxq_data->cq_db = cq_obj->db_rec;
+       rxq_data->cq_uar = mlx5_os_get_devx_uar_base_addr(sh->devx_rx_uar);
        rxq_data->cqe_n = log_cqe_n;
-       rxq_data->cqn = cq_obj->id;
+       rxq_data->cqn = cq_obj->cq->id;
        if (rxq_ctrl->obj->devx_channel) {
                ret = mlx5_os_devx_subscribe_devx_event
-                                               (rxq_ctrl->obj->devx_channel,
-                                                cq_obj->obj,
-                                                sizeof(event_nums),
-                                                event_nums,
-                                                (uint64_t)(uintptr_t)cq_obj);
+                                             (rxq_ctrl->obj->devx_channel,
+                                              cq_obj->cq->obj,
+                                              sizeof(event_nums),
+                                              event_nums,
+                                              (uint64_t)(uintptr_t)cq_obj->cq);
                if (ret) {
                        DRV_LOG(ERR, "Fail to subscribe CQ to event channel.");
-                       rte_errno = errno;
-                       goto error;
+                       ret = errno;
+                       mlx5_devx_cq_destroy(cq_obj);
+                       memset(cq_obj, 0, sizeof(*cq_obj));
+                       rte_errno = ret;
+                       return -ret;
                }
        }
-       /* Initialise CQ to 1's to mark HW ownership for all CQEs. */
-       memset((void *)(uintptr_t)rxq_data->cqes, 0xFF, cq_size);
-       return cq_obj;
-error:
-       if (cq_obj)
-               mlx5_devx_cmd_destroy(cq_obj);
-       mlx5_rxq_release_devx_cq_resources(rxq_ctrl);
-       return NULL;
+       return 0;
 }
 
 /**
@@ -655,8 +598,8 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
                tmpl->fd = mlx5_os_get_devx_channel_fd(tmpl->devx_channel);
        }
        /* Create CQ using DevX API. */
-       tmpl->devx_cq = mlx5_rxq_create_devx_cq_resources(dev, idx);
-       if (!tmpl->devx_cq) {
+       ret = mlx5_rxq_create_devx_cq_resources(dev, idx);
+       if (ret) {
                DRV_LOG(ERR, "Failed to create CQ.");
                goto error;
        }
@@ -682,12 +625,9 @@ error:
        ret = rte_errno; /* Save rte_errno before cleanup. */
        if (tmpl->rq)
                claim_zero(mlx5_devx_cmd_destroy(tmpl->rq));
-       if (tmpl->devx_cq)
-               claim_zero(mlx5_devx_cmd_destroy(tmpl->devx_cq));
        if (tmpl->devx_channel)
                mlx5_os_devx_destroy_event_channel(tmpl->devx_channel);
-       mlx5_rxq_release_devx_rq_resources(rxq_ctrl);
-       mlx5_rxq_release_devx_cq_resources(rxq_ctrl);
+       mlx5_rxq_release_devx_resources(rxq_ctrl);
        rte_errno = ret; /* Restore rte_errno. */
        return -rte_errno;
 }
index 1e9345a..aba9541 100644 (file)
@@ -196,11 +196,7 @@ struct mlx5_rxq_ctrl {
        struct mlx5_devx_dbr_page *rq_dbrec_page;
        uint64_t rq_dbr_offset;
        /* Storing RQ door-bell information, needed when freeing door-bell. */
-       struct mlx5_devx_dbr_page *cq_dbrec_page;
-       uint64_t cq_dbr_offset;
-       /* Storing CQ door-bell information, needed when freeing door-bell. */
        void *wq_umem; /* WQ buffer registration info. */
-       void *cq_umem; /* CQ buffer registration info. */
        struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
        uint32_t hairpin_status; /* Hairpin binding status. */
 };