shap_cfg_cmd->port_shapping_para = rte_cpu_to_le_32(shapping_para);
+ /*
+ * Configure the port_rate and set bit HNS3_TM_RATE_VLD_B of flag
+ * field in hns3_port_shapping_cmd to require firmware to recalculate
+ * shapping parameters. And whether the parameters are recalculated
+ * depends on the firmware version. But driver still needs to
+ * calculate it and configure to firmware for better compatibility.
+ */
+ shap_cfg_cmd->port_rate = rte_cpu_to_le_32(hw->mac.link_speed);
+ hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
return hns3_cmd_send(hw, &desc, 1);
}
static int
hns3_dcb_pg_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
- uint8_t pg_id, uint32_t shapping_para)
+ uint8_t pg_id, uint32_t shapping_para, uint32_t rate)
{
struct hns3_pg_shapping_cmd *shap_cfg_cmd;
enum hns3_opcode_type opcode;
shap_cfg_cmd->pg_shapping_para = rte_cpu_to_le_32(shapping_para);
+ /*
+ * Configure the pg_rate and set bit HNS3_TM_RATE_VLD_B of flag field in
+ * hns3_pg_shapping_cmd to require firmware to recalculate shapping
+ * parameters. And whether parameters are recalculated depends on
+ * the firmware version. But driver still needs to calculate it and
+ * configure to firmware for better compatibility.
+ */
+ shap_cfg_cmd->pg_rate = rte_cpu_to_le_32(rate);
+ hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
return hns3_cmd_send(hw, &desc, 1);
}
struct hns3_pf *pf = &hns->pf;
uint32_t ir_u, ir_b, ir_s;
uint32_t shaper_para;
+ uint32_t rate;
uint8_t i;
int ret;
/* Pg to pri */
for (i = 0; i < hw->dcb_info.num_pg; i++) {
+ rate = hw->dcb_info.pg_info[i].bw_limit;
+
/* Calc shaper para */
- ret = hns3_shaper_para_calc(hw,
- hw->dcb_info.pg_info[i].bw_limit,
- HNS3_SHAPER_LVL_PG,
+ ret = hns3_shaper_para_calc(hw, rate, HNS3_SHAPER_LVL_PG,
&shaper_parameter);
if (ret) {
hns3_err(hw, "calculate shaper parameter failed: %d",
HNS3_SHAPER_BS_S_DEF);
ret = hns3_dcb_pg_shapping_cfg(hw, HNS3_DCB_SHAP_C_BUCKET, i,
- shaper_para);
+ shaper_para, rate);
if (ret) {
hns3_err(hw,
"config PG CIR shaper parameter failed: %d",
HNS3_SHAPER_BS_S_DEF);
ret = hns3_dcb_pg_shapping_cfg(hw, HNS3_DCB_SHAP_P_BUCKET, i,
- shaper_para);
+ shaper_para, rate);
if (ret) {
hns3_err(hw,
"config PG PIR shaper parameter failed: %d",
static int
hns3_dcb_pri_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
- uint8_t pri_id, uint32_t shapping_para)
+ uint8_t pri_id, uint32_t shapping_para, uint32_t rate)
{
struct hns3_pri_shapping_cmd *shap_cfg_cmd;
enum hns3_opcode_type opcode;
shap_cfg_cmd->pri_shapping_para = rte_cpu_to_le_32(shapping_para);
+ /*
+ * Configure the pri_rate and set bit HNS3_TM_RATE_VLD_B of flag
+ * field in hns3_pri_shapping_cmd to require firmware to recalculate
+ * shapping parameters. And whether the parameters are recalculated
+ * depends on the firmware version. But driver still needs to
+ * calculate it and configure to firmware for better compatibility.
+ */
+ shap_cfg_cmd->pri_rate = rte_cpu_to_le_32(rate);
+ hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
return hns3_cmd_send(hw, &desc, 1);
}
struct hns3_shaper_parameter shaper_parameter;
uint32_t ir_u, ir_b, ir_s;
uint32_t shaper_para;
+ uint32_t rate;
int ret, i;
for (i = 0; i < hw->dcb_info.num_tc; i++) {
- ret = hns3_shaper_para_calc(hw,
- hw->dcb_info.tc_info[i].bw_limit,
- HNS3_SHAPER_LVL_PRI,
+ rate = hw->dcb_info.tc_info[i].bw_limit;
+ ret = hns3_shaper_para_calc(hw, rate, HNS3_SHAPER_LVL_PRI,
&shaper_parameter);
if (ret) {
hns3_err(hw, "calculate shaper parameter failed: %d",
HNS3_SHAPER_BS_S_DEF);
ret = hns3_dcb_pri_shapping_cfg(hw, HNS3_DCB_SHAP_C_BUCKET, i,
- shaper_para);
+ shaper_para, rate);
if (ret) {
hns3_err(hw,
"config priority CIR shaper parameter failed: %d",
HNS3_SHAPER_BS_S_DEF);
ret = hns3_dcb_pri_shapping_cfg(hw, HNS3_DCB_SHAP_P_BUCKET, i,
- shaper_para);
+ shaper_para, rate);
if (ret) {
hns3_err(hw,
"config priority PIR shaper parameter failed: %d",
/* SP or DWRR */
#define HNS3_DCB_TX_SCHD_DWRR_MSK BIT(0)
-#define HNS3_DCB_TX_SCHD_SP_MSK (0xFE)
+#define HNS3_DCB_TX_SCHD_SP_MSK 0xFE
enum hns3_shap_bucket {
HNS3_DCB_SHAP_C_BUCKET = 0,
#define HNS3_DCB_SHAP_BS_S_MSK GENMASK(25, 21)
#define HNS3_DCB_SHAP_BS_S_LSH 21
+/*
+ * For more flexible selection of shapping algorithm in different network
+ * engine, the algorithm calculating shapping parameter is moved to firmware to
+ * execute. Bit HNS3_TM_RATE_VLD_B of flag field in hns3_pri_shapping_cmd,
+ * hns3_pg_shapping_cmd or hns3_port_shapping_cmd is set to 1 to require
+ * firmware to recalculate shapping parameters. However, whether the parameters
+ * are recalculated depends on the firmware version. If firmware doesn't support
+ * the calculation of shapping parameters, such as on network engine with
+ * revision id 0x21, the value driver calculated will be used to configure to
+ * hardware. On the contrary, firmware ignores configuration of driver
+ * and recalculates the parameter.
+ */
+#define HNS3_TM_RATE_VLD_B 0
+
struct hns3_pri_shapping_cmd {
uint8_t pri_id;
uint8_t rsvd[3];
uint32_t pri_shapping_para;
- uint32_t rsvd1[4];
+ uint8_t flag;
+ uint8_t rsvd1[3];
+ uint32_t pri_rate; /* Unit Mbps */
+ uint8_t rsvd2[8];
};
struct hns3_pg_shapping_cmd {
uint8_t pg_id;
uint8_t rsvd[3];
uint32_t pg_shapping_para;
- uint32_t rsvd1[4];
+ uint8_t flag;
+ uint8_t rsvd1[3];
+ uint32_t pg_rate; /* Unit Mbps */
+ uint8_t rsvd2[8];
+};
+
+struct hns3_port_shapping_cmd {
+ uint32_t port_shapping_para;
+ uint8_t flag;
+ uint8_t rsvd[3];
+ uint32_t port_rate; /* Unit Mbps */
+ uint8_t rsvd1[12];
};
#define HNS3_BP_GRP_NUM 32
uint8_t rsvd[22];
};
-struct hns3_port_shapping_cmd {
- uint32_t port_shapping_para;
- uint32_t rsvd[5];
-};
-
struct hns3_cfg_pause_param_cmd {
uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
uint8_t pause_trans_gap;