net/ice/base: read more security revision options
authorQi Zhang <qi.z.zhang@intel.com>
Tue, 15 Dec 2020 01:14:30 +0000 (09:14 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 8 Jan 2021 15:03:06 +0000 (16:03 +0100)
Added read of security revision disabled and updated disabled.

Signed-off-by: Fabio Pricoco <fabio.pricoco@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
drivers/net/ice/base/ice_common.c
drivers/net/ice/base/ice_type.h

index 304e55e..b217ae6 100644 (file)
@@ -1882,6 +1882,23 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
                ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,
                          caps->msix_vector_first_id);
                break;
+       case ICE_AQC_CAPS_NVM_MGMT:
+               caps->sec_rev_disabled =
+                       (number & ICE_NVM_MGMT_SEC_REV_DISABLED) ?
+                       true : false;
+               ice_debug(hw, ICE_DBG_INIT, "%s: sec_rev_disabled = %d\n", prefix,
+                         caps->sec_rev_disabled);
+               caps->update_disabled =
+                       (number & ICE_NVM_MGMT_UPDATE_DISABLED) ?
+                       true : false;
+               ice_debug(hw, ICE_DBG_INIT, "%s: update_disabled = %d\n", prefix,
+                         caps->update_disabled);
+               caps->nvm_unified_update =
+                       (number & ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?
+                       true : false;
+               ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix,
+                         caps->nvm_unified_update);
+               break;
        case ICE_AQC_CAPS_MAX_MTU:
                caps->max_mtu = number;
                ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n",
index 6b8d44f..3b54ce9 100644 (file)
@@ -419,7 +419,11 @@ struct ice_hw_common_caps {
        u8 apm_wol_support;
        u8 acpi_prog_mthd;
        u8 proxy_support;
+       bool sec_rev_disabled;
+       bool update_disabled;
        bool nvm_unified_update;
+#define ICE_NVM_MGMT_SEC_REV_DISABLED          BIT(0)
+#define ICE_NVM_MGMT_UPDATE_DISABLED           BIT(1)
 #define ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT       BIT(3)
 };