plt_err("Err_irq=0x%" PRIx64 " pf=%d, vf=%d", intr, dev->pf, dev->vf);
+ /* Dump lf registers */
+ cpt_lf_print(lf);
+
/* Clear interrupt */
plt_write64(intr, lf->rbase + CPT_LF_MISC_INT);
}
plt_cpt_dbg("CPT LF REG:");
plt_cpt_dbg("LF_CTL[0x%016llx]: 0x%016" PRIx64, CPT_LF_CTL,
plt_read64(lf->rbase + CPT_LF_CTL));
- plt_cpt_dbg("Q_SIZE[0x%016llx]: 0x%016" PRIx64, CPT_LF_INPROG,
+ plt_cpt_dbg("LF_INPROG[0x%016llx]: 0x%016" PRIx64, CPT_LF_INPROG,
plt_read64(lf->rbase + CPT_LF_INPROG));
plt_cpt_dbg("Q_BASE[0x%016llx]: 0x%016" PRIx64, CPT_LF_Q_BASE,
return 0;
}
-static void
+void
cpt_lf_print(struct roc_cpt_lf *lf)
{
uint64_t reg_val;
+ reg_val = plt_read64(lf->rbase + CPT_LF_Q_BASE);
+ plt_print(" CPT_LF_Q_BASE:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_Q_SIZE);
+ plt_print(" CPT_LF_Q_SIZE:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_Q_INST_PTR);
+ plt_print(" CPT_LF_Q_INST_PTR:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_Q_GRP_PTR);
+ plt_print(" CPT_LF_Q_GRP_PTR:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_CTL);
+ plt_print(" CPT_LF_CTL:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_MISC_INT_ENA_W1S);
+ plt_print(" CPT_LF_MISC_INT_ENA_W1S:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_MISC_INT);
+ plt_print(" CPT_LF_MISC_INT:\t%016lx", reg_val);
+
+ reg_val = plt_read64(lf->rbase + CPT_LF_INPROG);
+ plt_print(" CPT_LF_INPROG:\t%016lx", reg_val);
+
+ if (roc_model_is_cn9k())
+ return;
+
+ plt_print("Count registers for CPT LF%d:", lf->lf_id);
+
reg_val = plt_read64(lf->rbase + CPT_LF_CTX_ENC_BYTE_CNT);
plt_print(" Encrypted byte count:\t%" PRIu64, reg_val);
if (lf == NULL)
continue;
- plt_print("Count registers for CPT LF%d:", lf_id);
cpt_lf_print(lf);
}
uint8_t lf_id, bool ena);
int cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp);
uint64_t cpt_get_blkaddr(struct dev *dev);
+void cpt_lf_print(struct roc_cpt_lf *lf);
#endif /* _ROC_CPT_PRIV_H_ */