ethdev: reduce alignment requirement for 128-byte cache line
authorJerin Jacob <jerin.jacob@caviumnetworks.com>
Fri, 29 Jan 2016 07:45:55 +0000 (13:15 +0530)
committerThomas Monjalon <thomas.monjalon@6wind.com>
Thu, 11 Feb 2016 11:45:35 +0000 (12:45 +0100)
slow-path data structures need not be 128-byte cache aligned.
Reduce the alignment to 64-byte to save the memory.

No behavior change for 64-byte cache aligned systems as minimum
cache line size as 64.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
lib/librte_ether/rte_ethdev.h

index 8710dd7..16da821 100644 (file)
@@ -863,7 +863,7 @@ struct rte_eth_rxq_info {
        struct rte_eth_rxconf conf; /**< queue config parameters. */
        uint8_t scattered_rx;       /**< scattered packets RX supported. */
        uint16_t nb_desc;           /**< configured number of RXDs. */
-} __rte_cache_aligned;
+} __rte_cache_min_aligned;
 
 /**
  * Ethernet device TX queue information structure.
@@ -872,7 +872,7 @@ struct rte_eth_rxq_info {
 struct rte_eth_txq_info {
        struct rte_eth_txconf conf; /**< queue config parameters. */
        uint16_t nb_desc;           /**< configured number of TXDs. */
-} __rte_cache_aligned;
+} __rte_cache_min_aligned;
 
 /** Maximum name length for extended statistics counters */
 #define RTE_ETH_XSTATS_NAME_SIZE 64