net/mvpp2: update start header name in config file
authorDana Vardi <danat@marvell.com>
Wed, 27 Jan 2021 16:09:43 +0000 (18:09 +0200)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 29 Jan 2021 17:16:11 +0000 (18:16 +0100)
Change 'dsa_mode' to 'start_hdr' in config file

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
doc/guides/nics/mvpp2.rst
drivers/net/mvpp2/mrvl_qos.c

index 5b22cf3..f72e251 100644 (file)
@@ -216,7 +216,7 @@ Configuration syntax
    offset = <offset>
 
    [port <portnum> default]
-   dsa_mode = <dsa_mode>
+   start_hdr = <start_hdr>
    default_tc = <default_tc>
    mapping_priority = <mapping_priority>
 
@@ -261,7 +261,7 @@ Where:
 
 - ``<portnum>``: DPDK Port number (0..n).
 
-- ``<dsa_mode>``: Indicate what is the dsa header mode (`none`, `dsa`, or `ext_dsa`).
+- ``<start_hdr>``: Indicate what is the start header mode (`none` (eth), `dsa`, or `ext_dsa`).
 
 - ``<default_tc>``: Default traffic class (e.g. 0)
 
index a3add54..e420c0c 100644 (file)
 /* Parsing tokens. Defined conveniently, so that any correction is easy. */
 #define MRVL_TOK_DEFAULT "default"
 #define MRVL_TOK_DSA_MODE "dsa_mode"
-#define MRVL_TOK_DSA_MODE_NONE "none"
-#define MRVL_TOK_DSA_MODE_DSA "dsa"
-#define MRVL_TOK_DSA_MODE_EXT_DSA "ext_dsa"
+#define MRVL_TOK_START_HDR "start_hdr"
+#define MRVL_TOK_START_HDR_NONE "none"
+#define MRVL_TOK_START_HDR_DSA "dsa"
+#define MRVL_TOK_START_HDR_EXT_DSA "ext_dsa"
 #define MRVL_TOK_DEFAULT_TC "default_tc"
 #define MRVL_TOK_DSCP "dscp"
 #define MRVL_TOK_MAPPING_PRIORITY "mapping_priority"
@@ -722,25 +723,33 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)
                        continue;
                }
 
+               /* MRVL_TOK_START_HDR replaces MRVL_TOK_DSA_MODE parameter.
+                * MRVL_TOK_DSA_MODE will be supported for backward
+                * compatibillity.
+                */
                entry = rte_cfgfile_get_entry(file, sec_name,
+                               MRVL_TOK_START_HDR);
+               /* if start_hsr is missing, check if dsa_mode exist instead */
+               if (entry == NULL)
+                       entry = rte_cfgfile_get_entry(file, sec_name,
                                MRVL_TOK_DSA_MODE);
                if (entry) {
-                       if (!strncmp(entry, MRVL_TOK_DSA_MODE_NONE,
-                               sizeof(MRVL_TOK_DSA_MODE_NONE)))
+                       if (!strncmp(entry, MRVL_TOK_START_HDR_NONE,
+                               sizeof(MRVL_TOK_START_HDR_NONE)))
                                (*cfg)->port[n].eth_start_hdr =
                                PP2_PPIO_HDR_ETH;
-                       else if (!strncmp(entry, MRVL_TOK_DSA_MODE_DSA,
-                               sizeof(MRVL_TOK_DSA_MODE_DSA)))
+                       else if (!strncmp(entry, MRVL_TOK_START_HDR_DSA,
+                               sizeof(MRVL_TOK_START_HDR_DSA)))
                                (*cfg)->port[n].eth_start_hdr =
                                PP2_PPIO_HDR_ETH_DSA;
-                       else if (!strncmp(entry, MRVL_TOK_DSA_MODE_EXT_DSA,
-                               sizeof(MRVL_TOK_DSA_MODE_EXT_DSA))) {
+                       else if (!strncmp(entry, MRVL_TOK_START_HDR_EXT_DSA,
+                               sizeof(MRVL_TOK_START_HDR_EXT_DSA))) {
                                (*cfg)->port[n].eth_start_hdr =
                                PP2_PPIO_HDR_ETH_EXT_DSA;
                        } else {
                                MRVL_LOG(ERR,
                                        "Error in parsing %s value (%s)!\n",
-                                       MRVL_TOK_DSA_MODE, entry);
+                                       MRVL_TOK_START_HDR, entry);
                                return -1;
                        }
                } else {