Initialize and configure PF module to support SRIOV.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
RSS hash = Y
RSS key update = Y
RSS reta update = Y
+SR-IOV = Y
VLAN filter = Y
CRC offload = Y
VLAN offload = Y
* Added VLAN and MAC filters.
* Added device basic statistics and extended stats.
* Added multi-queue and RSS.
+ * Added SRIOV.
* **Updated Marvell cnxk crypto PMD.**
sources = [
'ngbe_eeprom.c',
'ngbe_hw.c',
+ 'ngbe_mbx.c',
'ngbe_mng.c',
'ngbe_phy.c',
'ngbe_phy_rtl.c',
{
return NGBE_ERR_OPS_DUMMY;
}
+static inline void ngbe_mac_set_mac_anti_spoofing_dummy(struct ngbe_hw *TUP0,
+ bool TUP1, int TUP2)
+{
+}
+static inline void ngbe_mac_set_vlan_anti_spoofing_dummy(struct ngbe_hw *TUP0,
+ bool TUP1, int TUP2)
+{
+}
static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)
{
return NGBE_ERR_OPS_DUMMY;
{
return NGBE_ERR_OPS_DUMMY;
}
+
+/* struct ngbe_mbx_operations */
+static inline void ngbe_mbx_init_params_dummy(struct ngbe_hw *TUP0)
+{
+}
+
static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
{
hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
hw->mac.init_rx_addrs = ngbe_mac_init_rx_addrs_dummy;
hw->mac.update_mc_addr_list = ngbe_mac_update_mc_addr_list_dummy;
hw->mac.clear_vfta = ngbe_mac_clear_vfta_dummy;
+ hw->mac.set_mac_anti_spoofing = ngbe_mac_set_mac_anti_spoofing_dummy;
+ hw->mac.set_vlan_anti_spoofing = ngbe_mac_set_vlan_anti_spoofing_dummy;
hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
hw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy;
hw->phy.identify = ngbe_phy_identify_dummy;
hw->phy.write_reg_unlocked = ngbe_phy_write_reg_unlocked_dummy;
hw->phy.setup_link = ngbe_phy_setup_link_dummy;
hw->phy.check_link = ngbe_phy_check_link_dummy;
+ hw->mbx.init_params = ngbe_mbx_init_params_dummy;
}
#endif /* _NGBE_TYPE_DUMMY_H_ */
*/
#include "ngbe_type.h"
+#include "ngbe_mbx.h"
#include "ngbe_phy.h"
#include "ngbe_eeprom.h"
#include "ngbe_mng.h"
return status;
}
+/**
+ * ngbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for MAC anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
+ *
+ **/
+void ngbe_set_mac_anti_spoofing(struct ngbe_hw *hw, bool enable, int vf)
+{
+ u32 pfvfspoof;
+
+ pfvfspoof = rd32(hw, NGBE_POOLTXASMAC);
+ if (enable)
+ pfvfspoof |= (1 << vf);
+ else
+ pfvfspoof &= ~(1 << vf);
+ wr32(hw, NGBE_POOLTXASMAC, pfvfspoof);
+}
+
+/**
+ * ngbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
+ * @hw: pointer to hardware structure
+ * @enable: enable or disable switch for VLAN anti-spoofing
+ * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
+ *
+ **/
+void ngbe_set_vlan_anti_spoofing(struct ngbe_hw *hw, bool enable, int vf)
+{
+ u32 pfvfspoof;
+
+ pfvfspoof = rd32(hw, NGBE_POOLTXASVLAN);
+ if (enable)
+ pfvfspoof |= (1 << vf);
+ else
+ pfvfspoof &= ~(1 << vf);
+ wr32(hw, NGBE_POOLTXASVLAN, pfvfspoof);
+}
+
/**
* ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
* @hw: pointer to hardware structure
struct ngbe_mac_info *mac = &hw->mac;
struct ngbe_phy_info *phy = &hw->phy;
struct ngbe_rom_info *rom = &hw->rom;
+ struct ngbe_mbx_info *mbx = &hw->mbx;
DEBUGFUNC("ngbe_init_ops_pf");
mac->set_vmdq = ngbe_set_vmdq;
mac->clear_vmdq = ngbe_clear_vmdq;
mac->clear_vfta = ngbe_clear_vfta;
+ mac->set_mac_anti_spoofing = ngbe_set_mac_anti_spoofing;
+ mac->set_vlan_anti_spoofing = ngbe_set_vlan_anti_spoofing;
/* Link */
mac->get_link_capabilities = ngbe_get_link_capabilities_em;
mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;
mac->check_overtemp = ngbe_mac_check_overtemp;
+ mbx->init_params = ngbe_init_mbx_params_pf;
+
/* EEPROM */
rom->init_params = ngbe_init_eeprom_params;
rom->read32 = ngbe_ee_read32;
s32 ngbe_init_uta_tables(struct ngbe_hw *hw);
s32 ngbe_clear_vfta(struct ngbe_hw *hw);
+void ngbe_set_mac_anti_spoofing(struct ngbe_hw *hw, bool enable, int vf);
+void ngbe_set_vlan_anti_spoofing(struct ngbe_hw *hw, bool enable, int vf);
s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw);
s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw);
void ngbe_disable_rx(struct ngbe_hw *hw);
--- /dev/null
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#include "ngbe_type.h"
+
+#include "ngbe_mbx.h"
+
+/**
+ * ngbe_init_mbx_params_pf - set initial values for pf mailbox
+ * @hw: pointer to the HW structure
+ *
+ * Initializes the hw->mbx struct to correct values for pf mailbox
+ */
+void ngbe_init_mbx_params_pf(struct ngbe_hw *hw)
+{
+ struct ngbe_mbx_info *mbx = &hw->mbx;
+
+ mbx->timeout = 0;
+ mbx->usec_delay = 0;
+
+ mbx->size = NGBE_P2VMBX_SIZE;
+
+ mbx->stats.msgs_tx = 0;
+ mbx->stats.msgs_rx = 0;
+ mbx->stats.reqs = 0;
+ mbx->stats.acks = 0;
+ mbx->stats.rsts = 0;
+}
--- /dev/null
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_MBX_H_
+#define _NGBE_MBX_H_
+
+void ngbe_init_mbx_params_pf(struct ngbe_hw *hw);
+
+#endif /* _NGBE_MBX_H_ */
u32 mc_addr_count,
ngbe_mc_addr_itr func, bool clear);
s32 (*clear_vfta)(struct ngbe_hw *hw);
+ void (*set_mac_anti_spoofing)(struct ngbe_hw *hw, bool enable, int vf);
+ void (*set_vlan_anti_spoofing)(struct ngbe_hw *hw,
+ bool enable, int vf);
/* Manageability interface */
s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
u32 autoneg_advertised;
};
+struct ngbe_mbx_stats {
+ u32 msgs_tx;
+ u32 msgs_rx;
+
+ u32 acks;
+ u32 reqs;
+ u32 rsts;
+};
+
+struct ngbe_mbx_info {
+ void (*init_params)(struct ngbe_hw *hw);
+
+ struct ngbe_mbx_stats stats;
+ u32 timeout;
+ u32 usec_delay;
+ u16 size;
+};
+
enum ngbe_isb_idx {
NGBE_ISB_HEADER,
NGBE_ISB_MISC,
struct ngbe_phy_info phy;
struct ngbe_rom_info rom;
struct ngbe_bus_info bus;
+ struct ngbe_mbx_info mbx;
u16 device_id;
u16 vendor_id;
u16 sub_device_id;
sources = files(
'ngbe_ethdev.c',
'ngbe_ptypes.c',
+ 'ngbe_pf.c',
'ngbe_rxtx.c',
)
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
const struct rte_memzone *mz;
uint32_t ctrl_ext;
- int err;
+ int err, ret;
PMD_INIT_FUNC_TRACE();
/* initialize the hw strip bitmap*/
memset(hwstrip, 0, sizeof(*hwstrip));
+ /* initialize PF if max_vfs not zero */
+ ret = ngbe_pf_host_init(eth_dev);
+ if (ret) {
+ rte_free(eth_dev->data->mac_addrs);
+ eth_dev->data->mac_addrs = NULL;
+ rte_free(eth_dev->data->hash_mac_addrs);
+ eth_dev->data->hash_mac_addrs = NULL;
+ return ret;
+ }
+
ctrl_ext = rd32(hw, NGBE_PORTCTL);
/* let hardware know driver is loaded */
ctrl_ext |= NGBE_PORTCTL_DRVLOAD;
hw->mac.start_hw(hw);
hw->mac.get_link_status = true;
+ /* configure PF module if SRIOV enabled */
+ ngbe_pf_host_configure(dev);
+
ngbe_dev_phy_intr_setup(dev);
/* check and configure queue intr-vector mapping */
struct rte_eth_link link;
struct ngbe_adapter *adapter = ngbe_dev_adapter(dev);
struct ngbe_hw *hw = ngbe_dev_hw(dev);
+ struct ngbe_vf_info *vfinfo = *NGBE_DEV_VFDATA(dev);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
+ int vf;
if (hw->adapter_stopped)
return 0;
/* stop adapter */
ngbe_stop_hw(hw);
+ for (vf = 0; vfinfo != NULL && vf < pci_dev->max_vfs; vf++)
+ vfinfo[vf].clear_to_send = false;
+
ngbe_dev_clear_queues(dev);
/* Clear stored conf */
rte_delay_ms(100);
} while (retries++ < (10 + NGBE_LINK_UP_TIME));
+ /* uninitialize PF if max_vfs not zero */
+ ngbe_pf_host_uninit(dev);
+
rte_free(dev->data->mac_addrs);
dev->data->mac_addrs = NULL;
{
int ret;
+ /* When a DPDK PMD PF begin to reset PF port, it should notify all
+ * its VF to make them align with it. The detailed notification
+ * mechanism is PMD specific. As to ngbe PF, it is rather complex.
+ * To avoid unexpected behavior in VF, currently reset of PF with
+ * SR-IOV activation is not supported. It might be supported later.
+ */
+ if (dev->data->sriov.active)
+ return -ENOTSUP;
+
ret = eth_ngbe_dev_uninit(dev);
if (ret != 0)
return ret;
#define _NGBE_ETHDEV_H_
#include "ngbe_ptypes.h"
+#include <rte_ethdev.h>
+#include <rte_ethdev_core.h>
/* need update link, bit flag */
#define NGBE_FLAG_NEED_LINK_UPDATE ((uint32_t)(1 << 0))
uint32_t uta_shadow[NGBE_MAX_UTA];
};
+struct ngbe_vf_info {
+ uint8_t vf_mac_addresses[RTE_ETHER_ADDR_LEN];
+ bool clear_to_send;
+ uint16_t switch_domain_id;
+};
+
/*
* Structure to store private data for each driver instance (for each port).
*/
struct ngbe_stat_mappings stat_mappings;
struct ngbe_vfta shadow_vfta;
struct ngbe_hwstrip hwstrip;
+ struct ngbe_vf_info *vfdata;
struct ngbe_uta_info uta_info;
bool rx_bulk_alloc_allowed;
#define NGBE_DEV_HWSTRIP(dev) \
(&((struct ngbe_adapter *)(dev)->data->dev_private)->hwstrip)
+
+#define NGBE_DEV_VFDATA(dev) \
+ (&((struct ngbe_adapter *)(dev)->data->dev_private)->vfdata)
+
#define NGBE_DEV_UTA_INFO(dev) \
(&((struct ngbe_adapter *)(dev)->data->dev_private)->uta_info)
void ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev);
+int ngbe_pf_host_init(struct rte_eth_dev *eth_dev);
+
+void ngbe_pf_host_uninit(struct rte_eth_dev *eth_dev);
+
+int ngbe_pf_host_configure(struct rte_eth_dev *eth_dev);
+
#define NGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
#define NGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
#define NGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
--- /dev/null
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#include <rte_ether.h>
+#include <ethdev_driver.h>
+#include <rte_malloc.h>
+#include <rte_bus_pci.h>
+
+#include "base/ngbe.h"
+#include "ngbe_ethdev.h"
+
+#define NGBE_MAX_VFTA (128)
+
+static inline uint16_t
+dev_num_vf(struct rte_eth_dev *eth_dev)
+{
+ struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+ /* EM only support 7 VFs. */
+ return pci_dev->max_vfs;
+}
+
+static inline
+int ngbe_vf_perm_addr_gen(struct rte_eth_dev *dev, uint16_t vf_num)
+{
+ unsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];
+ struct ngbe_vf_info *vfinfo = *NGBE_DEV_VFDATA(dev);
+ uint16_t vfn;
+
+ for (vfn = 0; vfn < vf_num; vfn++) {
+ rte_eth_random_addr(vf_mac_addr);
+ /* keep the random address as default */
+ memcpy(vfinfo[vfn].vf_mac_addresses, vf_mac_addr,
+ RTE_ETHER_ADDR_LEN);
+ }
+
+ return 0;
+}
+
+int ngbe_pf_host_init(struct rte_eth_dev *eth_dev)
+{
+ struct ngbe_vf_info **vfinfo = NGBE_DEV_VFDATA(eth_dev);
+ struct ngbe_uta_info *uta_info = NGBE_DEV_UTA_INFO(eth_dev);
+ struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
+ uint16_t vf_num;
+ uint8_t nb_queue = 1;
+ int ret = 0;
+
+ PMD_INIT_FUNC_TRACE();
+
+ RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
+ vf_num = dev_num_vf(eth_dev);
+ if (vf_num == 0)
+ return ret;
+
+ *vfinfo = rte_zmalloc("vf_info",
+ sizeof(struct ngbe_vf_info) * vf_num, 0);
+ if (*vfinfo == NULL) {
+ PMD_INIT_LOG(ERR,
+ "Cannot allocate memory for private VF data\n");
+ return -ENOMEM;
+ }
+
+ ret = rte_eth_switch_domain_alloc(&(*vfinfo)->switch_domain_id);
+ if (ret) {
+ PMD_INIT_LOG(ERR,
+ "failed to allocate switch domain for device %d", ret);
+ rte_free(*vfinfo);
+ *vfinfo = NULL;
+ return ret;
+ }
+
+ memset(uta_info, 0, sizeof(struct ngbe_uta_info));
+ hw->mac.mc_filter_type = 0;
+
+ RTE_ETH_DEV_SRIOV(eth_dev).active = RTE_ETH_8_POOLS;
+ RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = nb_queue;
+ RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx =
+ (uint16_t)(vf_num * nb_queue);
+
+ ngbe_vf_perm_addr_gen(eth_dev, vf_num);
+
+ /* init_mailbox_params */
+ hw->mbx.init_params(hw);
+
+ return ret;
+}
+
+void ngbe_pf_host_uninit(struct rte_eth_dev *eth_dev)
+{
+ struct ngbe_vf_info **vfinfo;
+ uint16_t vf_num;
+ int ret;
+
+ PMD_INIT_FUNC_TRACE();
+
+ RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
+ RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = 0;
+ RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx = 0;
+
+ vf_num = dev_num_vf(eth_dev);
+ if (vf_num == 0)
+ return;
+
+ vfinfo = NGBE_DEV_VFDATA(eth_dev);
+ if (*vfinfo == NULL)
+ return;
+
+ ret = rte_eth_switch_domain_free((*vfinfo)->switch_domain_id);
+ if (ret)
+ PMD_INIT_LOG(WARNING, "failed to free switch domain: %d", ret);
+
+ rte_free(*vfinfo);
+ *vfinfo = NULL;
+}
+
+int ngbe_pf_host_configure(struct rte_eth_dev *eth_dev)
+{
+ uint32_t vtctl, fcrth;
+ uint32_t vfre_offset;
+ uint16_t vf_num;
+ const uint8_t VFRE_SHIFT = 5; /* VFRE 32 bits per slot */
+ const uint8_t VFRE_MASK = (uint8_t)((1U << VFRE_SHIFT) - 1);
+ struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
+ uint32_t gpie;
+ uint32_t gcr_ext;
+ uint32_t vlanctrl;
+ int i;
+
+ vf_num = dev_num_vf(eth_dev);
+ if (vf_num == 0)
+ return -1;
+
+ /* set the default pool for PF */
+ vtctl = rd32(hw, NGBE_POOLCTL);
+ vtctl &= ~NGBE_POOLCTL_DEFPL_MASK;
+ vtctl |= NGBE_POOLCTL_DEFPL(vf_num);
+ vtctl |= NGBE_POOLCTL_RPLEN;
+ wr32(hw, NGBE_POOLCTL, vtctl);
+
+ vfre_offset = vf_num & VFRE_MASK;
+
+ /* Enable pools reserved to PF only */
+ wr32(hw, NGBE_POOLRXENA(0), (~0U) << vfre_offset);
+ wr32(hw, NGBE_POOLTXENA(0), (~0U) << vfre_offset);
+
+ wr32(hw, NGBE_PSRCTL, NGBE_PSRCTL_LBENA);
+
+ /* clear VMDq map to perment rar 0 */
+ hw->mac.clear_vmdq(hw, 0, BIT_MASK32);
+
+ /* clear VMDq map to scan rar 31 */
+ wr32(hw, NGBE_ETHADDRIDX, hw->mac.num_rar_entries);
+ wr32(hw, NGBE_ETHADDRASS, 0);
+
+ /* set VMDq map to default PF pool */
+ hw->mac.set_vmdq(hw, 0, vf_num);
+
+ /*
+ * SW msut set PORTCTL.VT_Mode the same as GPIE.VT_Mode
+ */
+ gpie = rd32(hw, NGBE_GPIE);
+ gpie |= NGBE_GPIE_MSIX;
+ gcr_ext = rd32(hw, NGBE_PORTCTL);
+ gcr_ext &= ~NGBE_PORTCTL_NUMVT_MASK;
+
+ if (RTE_ETH_DEV_SRIOV(eth_dev).active == RTE_ETH_8_POOLS)
+ gcr_ext |= NGBE_PORTCTL_NUMVT_8;
+
+ wr32(hw, NGBE_PORTCTL, gcr_ext);
+ wr32(hw, NGBE_GPIE, gpie);
+
+ /*
+ * enable vlan filtering and allow all vlan tags through
+ */
+ vlanctrl = rd32(hw, NGBE_VLANCTL);
+ vlanctrl |= NGBE_VLANCTL_VFE; /* enable vlan filters */
+ wr32(hw, NGBE_VLANCTL, vlanctrl);
+
+ /* enable all vlan filters */
+ for (i = 0; i < NGBE_MAX_VFTA; i++)
+ wr32(hw, NGBE_VLANTBL(i), 0xFFFFFFFF);
+
+ /* Enable MAC Anti-Spoofing */
+ hw->mac.set_mac_anti_spoofing(hw, FALSE, vf_num);
+
+ /* set flow control threshold to max to avoid tx switch hang */
+ wr32(hw, NGBE_FCWTRLO, 0);
+ fcrth = rd32(hw, NGBE_PBRXSIZE) - 32;
+ wr32(hw, NGBE_FCWTRHI, fcrth);
+
+ return 0;
+}
+
txq->hthresh = tx_conf->tx_thresh.hthresh;
txq->wthresh = tx_conf->tx_thresh.wthresh;
txq->queue_id = queue_idx;
- txq->reg_idx = queue_idx;
+ txq->reg_idx = (uint16_t)((RTE_ETH_DEV_SRIOV(dev).active == 0) ?
+ queue_idx : RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue_idx);
txq->port_id = dev->data->port_id;
txq->offloads = offloads;
txq->ops = &def_txq_ops;
rxq->nb_rx_desc = nb_desc;
rxq->rx_free_thresh = rx_conf->rx_free_thresh;
rxq->queue_id = queue_idx;
- rxq->reg_idx = queue_idx;
+ rxq->reg_idx = (uint16_t)((RTE_ETH_DEV_SRIOV(dev).active == 0) ?
+ queue_idx : RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue_idx);
rxq->port_id = dev->data->port_id;
if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC)
rxq->crc_len = RTE_ETHER_CRC_LEN;
static int
ngbe_dev_mq_rx_configure(struct rte_eth_dev *dev)
{
- switch (dev->data->dev_conf.rxmode.mq_mode) {
- case RTE_ETH_MQ_RX_RSS:
- ngbe_rss_configure(dev);
- break;
+ if (RTE_ETH_DEV_SRIOV(dev).active == 0) {
+ switch (dev->data->dev_conf.rxmode.mq_mode) {
+ case RTE_ETH_MQ_RX_RSS:
+ ngbe_rss_configure(dev);
+ break;
- case RTE_ETH_MQ_RX_NONE:
- default:
- /* if mq_mode is none, disable rss mode.*/
- ngbe_rss_disable(dev);
- break;
+ case RTE_ETH_MQ_RX_NONE:
+ default:
+ /* if mq_mode is none, disable rss mode.*/
+ ngbe_rss_disable(dev);
+ break;
+ }
}
return 0;
git.droids-corp.org / dpdk.git / commitdiff