common/cnxk: register BPHY IRQ
authorTomasz Duszynski <tduszynski@marvell.com>
Mon, 21 Jun 2021 15:04:39 +0000 (17:04 +0200)
committerThomas Monjalon <thomas@monjalon.net>
Mon, 5 Jul 2021 21:08:08 +0000 (23:08 +0200)
Add support for registering user supplied baseband PHY IRQ handler.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
drivers/common/cnxk/roc_bphy_irq.c
drivers/common/cnxk/roc_bphy_irq.h
drivers/common/cnxk/version.map

index 4b87fc8..882066e 100644 (file)
@@ -382,3 +382,41 @@ roc_bphy_handler_clear(struct roc_bphy_irq_chip *chip, int irq_num)
 
        return retval;
 }
+
+int
+roc_bphy_intr_register(struct roc_bphy_irq_chip *irq_chip,
+                      struct roc_bphy_intr *intr)
+{
+       roc_cpuset_t orig_cpuset, intr_cpuset;
+       int retval;
+       int ret;
+
+       if (!roc_bphy_intr_available(irq_chip, intr->irq_num))
+               return -ENOTSUP;
+
+       retval = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),
+                                       &orig_cpuset);
+       if (retval < 0) {
+               plt_err("Failed to get affinity mask");
+               return retval;
+       }
+
+       CPU_ZERO(&intr_cpuset);
+       CPU_SET(intr->cpu, &intr_cpuset);
+       retval = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),
+                                       &intr_cpuset);
+       if (retval < 0) {
+               plt_err("Failed to set affinity mask");
+               return retval;
+       }
+
+       ret = roc_bphy_irq_handler_set(irq_chip, intr->irq_num,
+                                      intr->intr_handler, intr->isr_data);
+
+       retval = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),
+                                       &orig_cpuset);
+       if (retval < 0)
+               plt_warn("Failed to restore affinity mask");
+
+       return ret;
+}
index 778764f..19ec5fd 100644 (file)
@@ -21,6 +21,15 @@ struct roc_bphy_irq_chip {
        char *mz_name;
 };
 
+struct roc_bphy_intr {
+       int irq_num;
+       void (*intr_handler)(int irq_num, void *isr_data);
+       void *isr_data;
+       int cpu;
+       /* stack for this interrupt, not supplied by a user */
+       uint8_t *sp;
+};
+
 __roc_api struct roc_bphy_irq_chip *roc_bphy_intr_init(void);
 __roc_api void roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip);
 __roc_api void roc_bphy_irq_stack_remove(int cpu);
@@ -34,5 +43,7 @@ __roc_api bool roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip,
                                       int irq_num);
 __roc_api int roc_bphy_handler_clear(struct roc_bphy_irq_chip *chip,
                                     int irq_num);
+__roc_api int roc_bphy_intr_register(struct roc_bphy_irq_chip *irq_chip,
+                                    struct roc_bphy_intr *intr);
 
 #endif /* _ROC_BPHY_IRQ_ */
index 941055b..e24766c 100644 (file)
@@ -27,6 +27,7 @@ INTERNAL {
        roc_bphy_intr_fini;
        roc_bphy_intr_handler;
        roc_bphy_intr_init;
+       roc_bphy_intr_register;
        roc_bphy_irq_handler_set;
        roc_bphy_irq_stack_get;
        roc_bphy_irq_stack_remove;