net/octeontx2: add info get operation

Add device information get operation.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>

diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini
index 84d5ad7..356b88d 100644 (file)
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -4,6 +4,10 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
+Lock-free Tx queue   = Y
+SR-IOV               = Y
+Multiprocess aware   = Y
 Linux VFIO           = Y
 ARMv8                = Y
 Usage doc            = Y

diff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini
index 5fd7e4c..5f4eaa3 100644 (file)
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -4,6 +4,10 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
+Lock-free Tx queue   = Y
+SR-IOV               = Y
+Multiprocess aware   = Y
 Linux VFIO           = Y
 ARMv8                = Y
 Usage doc            = Y

diff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini
index 3128cc1..024b032 100644 (file)
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -4,6 +4,9 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
+Lock-free Tx queue   = Y
+Multiprocess aware   = Y
 Linux VFIO           = Y
 ARMv8                = Y
 Usage doc            = Y

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index 92a7ebc..e3f4c2c 100644 (file)
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -16,6 +16,8 @@ Features
 
 Features of the OCTEON TX2 Ethdev PMD are:
 
+- SR-IOV VF
+- Lock-free Tx queue
 
 Prerequisites
 -------------

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index f1c136b..9ec7686 100644 (file)
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -34,6 +34,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
        otx2_mac.c      \
        otx2_ethdev.c   \
        otx2_ethdev_irq.c \
+       otx2_ethdev_ops.c \
        otx2_ethdev_devargs.c
 
 LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2 -lrte_eal

diff --git a/drivers/net/octeontx2/meson.build b/drivers/net/octeontx2/meson.build
index 148f7d3..aa8417e 100644 (file)
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -6,6 +6,7 @@ sources = files(
                'otx2_mac.c',
                'otx2_ethdev.c',
                'otx2_ethdev_irq.c',
+               'otx2_ethdev_ops.c',
                'otx2_ethdev_devargs.c'
                )
 

diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index 67a7ebb..6e3c705 100644 (file)
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -64,6 +64,11 @@ nix_lf_free(struct otx2_eth_dev *dev)
        return otx2_mbox_process(mbox);
 }
 
+/* Initialize and register driver with DPDK Application */
+static const struct eth_dev_ops otx2_eth_dev_ops = {
+       .dev_infos_get            = otx2_nix_info_get,
+};
+
 static inline int
 nix_lf_attach(struct otx2_eth_dev *dev)
 {
@@ -120,6 +125,8 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
        struct rte_pci_device *pci_dev;
        int rc, max_entries;
 
+       eth_dev->dev_ops = &otx2_eth_dev_ops;
+
        /* For secondary processes, the primary has done all the work */
        if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
                /* Setup callbacks for secondary process */

diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index f7d8838..666ceba 100644 (file)
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -33,9 +33,50 @@
 /* Used for struct otx2_eth_dev::flags */
 #define OTX2_LINK_CFG_IN_PROGRESS_F    BIT_ULL(0)
 
+/* VLAN tag inserted by NIX_TX_VTAG_ACTION.
+ * In Tx space is always reserved for this in FRS.
+ */
+#define NIX_MAX_VTAG_INS               2
+#define NIX_MAX_VTAG_ACT_SIZE          (4 * NIX_MAX_VTAG_INS)
+
+/* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */
+#define NIX_L2_OVERHEAD \
+       (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + 8)
+
+/* HW config of frame size doesn't include FCS */
+#define NIX_MAX_HW_FRS                 9212
+#define NIX_MIN_HW_FRS                 60
+
+/* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */
+#define NIX_MAX_FRS    \
+       (NIX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - NIX_MAX_VTAG_ACT_SIZE)
+
+#define NIX_MIN_FRS    \
+       (NIX_MIN_HW_FRS + RTE_ETHER_CRC_LEN)
+
+#define NIX_MAX_MTU    \
+       (NIX_MAX_FRS - NIX_L2_OVERHEAD)
+
 #define NIX_MAX_SQB                    512
 #define NIX_MIN_SQB                    32
+#define NIX_HASH_KEY_SIZE              48 /* 352 Bits */
 #define NIX_RSS_RETA_SIZE              64
+#define        NIX_RX_MIN_DESC                 16
+#define NIX_RX_MIN_DESC_ALIGN          16
+#define NIX_RX_NB_SEG_MAX              6
+
+/* If PTP is enabled additional SEND MEM DESC is required which
+ * takes 2 words, hence max 7 iova address are possible
+ */
+#if defined(RTE_LIBRTE_IEEE1588)
+#define NIX_TX_NB_SEG_MAX              7
+#else
+#define NIX_TX_NB_SEG_MAX              9
+#endif
+
+#define NIX_RSS_OFFLOAD                (ETH_RSS_PORT | ETH_RSS_IP | ETH_RSS_UDP |\
+                                ETH_RSS_TCP | ETH_RSS_SCTP | \
+                                ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
        DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
@@ -105,6 +146,10 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
        return eth_dev->data->dev_private;
 }
 
+/* Ops */
+void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
+                      struct rte_eth_dev_info *dev_info);
+
 /* IRQ */
 int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
 void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);

diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
new file mode 100644 (file)
index 0000000..df7e909
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_ethdev.h"
+
+void
+otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
+{
+       struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+       struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+
+       devinfo->min_rx_bufsize = NIX_MIN_FRS;
+       devinfo->max_rx_pktlen = NIX_MAX_FRS;
+       devinfo->max_rx_queues = RTE_MAX_QUEUES_PER_PORT;
+       devinfo->max_tx_queues = RTE_MAX_QUEUES_PER_PORT;
+       devinfo->max_mac_addrs = dev->max_mac_entries;
+       devinfo->max_vfs = pci_dev->max_vfs;
+       devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD;
+       devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD;
+
+       devinfo->rx_offload_capa = dev->rx_offload_capa;
+       devinfo->tx_offload_capa = dev->tx_offload_capa;
+       devinfo->rx_queue_offload_capa = 0;
+       devinfo->tx_queue_offload_capa = 0;
+
+       devinfo->reta_size = dev->rss_info.rss_size;
+       devinfo->hash_key_size = NIX_HASH_KEY_SIZE;
+       devinfo->flow_type_rss_offloads = NIX_RSS_OFFLOAD;
+
+       devinfo->default_rxconf = (struct rte_eth_rxconf) {
+               .rx_drop_en = 0,
+               .offloads = 0,
+       };
+
+       devinfo->default_txconf = (struct rte_eth_txconf) {
+               .offloads = 0,
+       };
+
+       devinfo->rx_desc_lim = (struct rte_eth_desc_lim) {
+               .nb_max = UINT16_MAX,
+               .nb_min = NIX_RX_MIN_DESC,
+               .nb_align = NIX_RX_MIN_DESC_ALIGN,
+               .nb_seg_max = NIX_RX_NB_SEG_MAX,
+               .nb_mtu_seg_max = NIX_RX_NB_SEG_MAX,
+       };
+       devinfo->rx_desc_lim.nb_max =
+               RTE_ALIGN_MUL_FLOOR(devinfo->rx_desc_lim.nb_max,
+                                   NIX_RX_MIN_DESC_ALIGN);
+
+       devinfo->tx_desc_lim = (struct rte_eth_desc_lim) {
+               .nb_max = UINT16_MAX,
+               .nb_min = 1,
+               .nb_align = 1,
+               .nb_seg_max = NIX_TX_NB_SEG_MAX,
+               .nb_mtu_seg_max = NIX_TX_NB_SEG_MAX,
+       };
+
+       /* Auto negotiation disabled */
+       devinfo->speed_capa = ETH_LINK_SPEED_FIXED;
+       devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
+                               ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
+                               ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G;
+}