]> git.droids-corp.org - dpdk.git/commitdiff
net/sfc/base: define max desc number for every EF10 NIC
authorIgor Romanov <igor.romanov@oktetlabs.ru>
Thu, 7 Feb 2019 16:29:11 +0000 (16:29 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 8 Feb 2019 10:35:41 +0000 (11:35 +0100)
For consistency with defines of min descriptor number, define max
descriptor number for Huntington, Medford and Medford2.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
drivers/net/sfc/base/hunt_impl.h
drivers/net/sfc/base/hunt_nic.c
drivers/net/sfc/base/medford2_impl.h
drivers/net/sfc/base/medford2_nic.c
drivers/net/sfc/base/medford_impl.h
drivers/net/sfc/base/medford_nic.c

index d8dddce8d851e2673081254eb2840ad43b59344c..0e9a1e2804dc53ae8e6f2f11269a57c6ee36f7c0 100644 (file)
@@ -16,6 +16,9 @@
 extern "C" {
 #endif
 
+#define        HUNT_TXQ_MAXNDESCS                      4096
+#define        HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND  2048
+
 /* Missing register definitions */
 #ifndef        ER_DZ_TX_PIOBUF_OFST
 #define        ER_DZ_TX_PIOBUF_OFST 0x00001000
index adb2b17eb3c41c9b535e68ab990e628af8cf5ad2..6605cfce4efaefca57d2f008dbd4c8f750a6051b 100644 (file)
@@ -194,7 +194,9 @@ hunt_board_cfg(
         * The workaround for bug35388 uses the top bit of transmit queue
         * descriptor writes, preventing the use of 4096 descriptor TXQs.
         */
-       encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ? 2048 : 4096;
+       encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ?
+           HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND :
+           HUNT_TXQ_MAXNDESCS;
        encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
        EFX_STATIC_ASSERT(HUNT_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
index 6259a700bc36d1b6405752068779d4bd0f7d2aa1..87af5f686ff1eb8eb051bf0f30382255bb9df900 100644 (file)
@@ -12,6 +12,8 @@ extern "C" {
 #endif
 
 
+#define        MEDFORD2_TXQ_MAXNDESCS  2048
+
 #ifndef        ER_EZ_TX_PIOBUF_SIZE
 #define        ER_EZ_TX_PIOBUF_SIZE    4096
 #endif
index 2cc87e3a9336ea9441b3df48fac3579f59c6bae9..020c37fd930d543c641a3c55a16d510377293913 100644 (file)
@@ -119,7 +119,7 @@ medford2_board_cfg(
         * descriptors are not supported as the top bit is used for vfifo
         * stuffing.
         */
-       encp->enc_txq_max_ndescs = 2048;
+       encp->enc_txq_max_ndescs = MEDFORD2_TXQ_MAXNDESCS;
        encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
        EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
index d076afa2dc74dfe3d2769ab416b1f30d00b671ea..1afedc7f3f9e88542320f250270bbe3cd355072f 100644 (file)
@@ -12,6 +12,8 @@ extern "C" {
 #endif
 
 
+#define        MEDFORD_TXQ_MAXNDESCS   2048
+
 #ifndef        ER_EZ_TX_PIOBUF_SIZE
 #define        ER_EZ_TX_PIOBUF_SIZE    4096
 #endif
index b728811798557a00d7d4d08187ac5acb4a30722c..171e39b03a2d7c087392bcc0f146d8e93bdd2a79 100644 (file)
@@ -117,7 +117,7 @@ medford_board_cfg(
         * descriptors are not supported as the top bit is used for vfifo
         * stuffing.
         */
-       encp->enc_txq_max_ndescs = 2048;
+       encp->enc_txq_max_ndescs = MEDFORD_TXQ_MAXNDESCS;
        encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
        EFX_STATIC_ASSERT(MEDFORD_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);