[suppress_variable]
name = rte_crypto_aead_algorithm_strings
+;;;;;;;;;;;;;;;;;;;;;;
+; Temporary exceptions for new __rte_internal marking till DPDK 20.11
+;;;;;;;;;;;;;;;;;;;;;;
; Ignore moving OCTEONTX2 stable functions to INTERNAL tag
[suppress_file]
file_name_regexp = ^librte_common_octeontx2\.
[suppress_file]
file_name_regexp = ^librte_mempool_octeontx2\.
+; Ignore moving mlx5 stable functions to INTERNAL
+[suppress_file]
+ file_name_regexp = ^librte_common_mlx5\.
return MLX5_CQE_STATUS_SW_OWN;
}
+__rte_internal
int mlx5_dev_to_pci_addr(const char *dev_path, struct rte_pci_addr *pci_addr);
#define MLX5_CLASS_ARG_NAME "class"
MLX5_CLASS_INVALID,
};
+__rte_internal
enum mlx5_class mlx5_class_get(struct rte_devargs *devargs);
+__rte_internal
void mlx5_translate_port_name(const char *port_name_in,
struct mlx5_switch_info *port_info_out);
param->port_id = mp_id->port_id;
}
-__rte_experimental
+__rte_internal
int mlx5_mp_init_primary(const char *name, const rte_mp_t primary_action);
-__rte_experimental
+__rte_internal
void mlx5_mp_uninit_primary(const char *name);
-__rte_experimental
+__rte_internal
int mlx5_mp_init_secondary(const char *name, const rte_mp_t secondary_action);
-__rte_experimental
+__rte_internal
void mlx5_mp_uninit_secondary(const char *name);
-__rte_experimental
+__rte_internal
int mlx5_mp_req_mr_create(struct mlx5_mp_id *mp_id, uintptr_t addr);
-__rte_experimental
+__rte_internal
int mlx5_mp_req_queue_state_modify(struct mlx5_mp_id *mp_id,
struct mlx5_mp_arg_queue_state_modify *sm);
-__rte_experimental
+__rte_internal
int mlx5_mp_req_verbs_cmd_fd(struct mlx5_mp_id *mp_id);
#endif /* RTE_PMD_MLX5_COMMON_MP_H_ */
return UINT32_MAX;
}
-__rte_experimental
+__rte_internal
int mlx5_mr_btree_init(struct mlx5_mr_btree *bt, int n, int socket);
-__rte_experimental
+__rte_internal
void mlx5_mr_btree_free(struct mlx5_mr_btree *bt);
-__rte_experimental
+__rte_internal
void mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused);
-__rte_experimental
+__rte_internal
uint32_t mlx5_mr_addr2mr_bh(struct ibv_pd *pd, struct mlx5_mp_id *mp_id,
struct mlx5_mr_share_cache *share_cache,
struct mlx5_mr_ctrl *mr_ctrl,
uintptr_t addr, unsigned int mr_ext_memseg_en);
-__rte_experimental
+__rte_internal
void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
-__rte_experimental
+__rte_internal
void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
-__rte_experimental
+__rte_internal
void mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache);
-__rte_experimental
+__rte_internal
void mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl);
-__rte_experimental
+__rte_internal
int
mlx5_mr_insert_cache(struct mlx5_mr_share_cache *share_cache,
struct mlx5_mr *mr);
-__rte_experimental
+__rte_internal
uint32_t
mlx5_mr_lookup_cache(struct mlx5_mr_share_cache *share_cache,
struct mr_cache_entry *entry, uintptr_t addr);
-__rte_experimental
+__rte_internal
struct mlx5_mr *
mlx5_mr_lookup_list(struct mlx5_mr_share_cache *share_cache,
struct mr_cache_entry *entry, uintptr_t addr);
-__rte_experimental
+__rte_internal
struct mlx5_mr *
mlx5_create_mr_ext(struct ibv_pd *pd, uintptr_t addr, size_t len,
int socket_id);
-__rte_experimental
+__rte_internal
uint32_t
mlx5_mr_create_primary(struct ibv_pd *pd,
struct mlx5_mr_share_cache *share_cache,
/* mlx5_devx_cmds.c */
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_flow_counter_alloc(struct ibv_context *ctx,
uint32_t bulk_sz);
+__rte_internal
int mlx5_devx_cmd_destroy(struct mlx5_devx_obj *obj);
+__rte_internal
int mlx5_devx_cmd_flow_counter_query(struct mlx5_devx_obj *dcs,
int clear, uint32_t n_counters,
uint64_t *pkts, uint64_t *bytes,
uint32_t mkey, void *addr,
struct mlx5dv_devx_cmd_comp *cmd_comp,
uint64_t async_id);
+__rte_internal
int mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx,
struct mlx5_hca_attr *attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_mkey_create(struct ibv_context *ctx,
struct mlx5_devx_mkey_attr *attr);
+__rte_internal
int mlx5_devx_get_out_command_status(void *out);
+__rte_internal
int mlx5_devx_cmd_qp_query_tis_td(struct ibv_qp *qp, uint32_t tis_num,
uint32_t *tis_td);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_rq(struct ibv_context *ctx,
struct mlx5_devx_create_rq_attr *rq_attr,
int socket);
+__rte_internal
int mlx5_devx_cmd_modify_rq(struct mlx5_devx_obj *rq,
struct mlx5_devx_modify_rq_attr *rq_attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_tir(struct ibv_context *ctx,
struct mlx5_devx_tir_attr *tir_attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_rqt(struct ibv_context *ctx,
struct mlx5_devx_rqt_attr *rqt_attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_sq(struct ibv_context *ctx,
struct mlx5_devx_create_sq_attr *sq_attr);
+__rte_internal
int mlx5_devx_cmd_modify_sq(struct mlx5_devx_obj *sq,
struct mlx5_devx_modify_sq_attr *sq_attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_tis(struct ibv_context *ctx,
struct mlx5_devx_tis_attr *tis_attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_td(struct ibv_context *ctx);
+__rte_internal
int mlx5_devx_cmd_flow_dump(void *fdb_domain, void *rx_domain, void *tx_domain,
FILE *file);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_cq(struct ibv_context *ctx,
struct mlx5_devx_cq_attr *attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_virtq(struct ibv_context *ctx,
struct mlx5_devx_virtq_attr *attr);
+__rte_internal
int mlx5_devx_cmd_modify_virtq(struct mlx5_devx_obj *virtq_obj,
struct mlx5_devx_virtq_attr *attr);
+__rte_internal
int mlx5_devx_cmd_query_virtq(struct mlx5_devx_obj *virtq_obj,
struct mlx5_devx_virtq_attr *attr);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_qp(struct ibv_context *ctx,
struct mlx5_devx_qp_attr *attr);
+__rte_internal
int mlx5_devx_cmd_modify_qp_state(struct mlx5_devx_obj *qp,
uint32_t qp_st_mod_op, uint32_t remote_qp_id);
+__rte_internal
int mlx5_devx_cmd_modify_rqt(struct mlx5_devx_obj *rqt,
struct mlx5_devx_rqt_attr *rqt_attr);
struct mlx5_nl_vlan_dev vlan_dev[4096];
};
-
+__rte_internal
int mlx5_nl_init(int protocol);
+__rte_internal
int mlx5_nl_mac_addr_add(int nlsk_fd, unsigned int iface_idx, uint64_t *mac_own,
struct rte_ether_addr *mac, uint32_t index);
+__rte_internal
int mlx5_nl_mac_addr_remove(int nlsk_fd, unsigned int iface_idx,
uint64_t *mac_own, struct rte_ether_addr *mac,
uint32_t index);
+__rte_internal
void mlx5_nl_mac_addr_sync(int nlsk_fd, unsigned int iface_idx,
struct rte_ether_addr *mac_addrs, int n);
+__rte_internal
void mlx5_nl_mac_addr_flush(int nlsk_fd, unsigned int iface_idx,
struct rte_ether_addr *mac_addrs, int n,
uint64_t *mac_own);
+__rte_internal
int mlx5_nl_promisc(int nlsk_fd, unsigned int iface_idx, int enable);
+__rte_internal
int mlx5_nl_allmulti(int nlsk_fd, unsigned int iface_idx, int enable);
+__rte_internal
unsigned int mlx5_nl_portnum(int nl, const char *name);
+__rte_internal
unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex);
+__rte_internal
int mlx5_nl_vf_mac_addr_modify(int nlsk_fd, unsigned int iface_idx,
struct rte_ether_addr *mac, int vf_index);
+__rte_internal
int mlx5_nl_switch_info(int nl, unsigned int ifindex,
struct mlx5_switch_info *info);
+__rte_internal
void mlx5_nl_vlan_vmwa_delete(struct mlx5_nl_vlan_vmwa_context *vmwa,
uint32_t ifindex);
+__rte_internal
uint32_t mlx5_nl_vlan_vmwa_create(struct mlx5_nl_vlan_vmwa_context *vmwa,
uint32_t ifindex, uint16_t tag);
+__rte_internal
int mlx5_nl_devlink_family_id_get(int nlsk_fd);
+__rte_internal
int mlx5_nl_enable_roce_get(int nlsk_fd, int family_id, const char *pci_addr,
int *enable);
+__rte_internal
int mlx5_nl_driver_reload(int nlsk_fd, int family_id, const char *pci_addr);
+__rte_internal
int mlx5_nl_enable_roce_set(int nlsk_fd, int family_id, const char *pci_addr,
int enable);
-DPDK_21 {
+INTERNAL {
global:
mlx5_class_get;
+ mlx5_create_mr_ext;
+
+ mlx5_dev_to_pci_addr;
+
mlx5_devx_cmd_create_cq;
mlx5_devx_cmd_create_qp;
mlx5_devx_cmd_create_rq;
mlx5_devx_cmd_query_virtq;
mlx5_devx_get_out_command_status;
- mlx5_dev_to_pci_addr;
+ mlx5_mp_init_primary;
+ mlx5_mp_uninit_primary;
+ mlx5_mp_init_secondary;
+ mlx5_mp_uninit_secondary;
+ mlx5_mp_req_mr_create;
+ mlx5_mp_req_queue_state_modify;
+ mlx5_mp_req_verbs_cmd_fd;
+
+ mlx5_mr_btree_init;
+ mlx5_mr_btree_free;
+ mlx5_mr_btree_dump;
+ mlx5_mr_addr2mr_bh;
+ mlx5_mr_release_cache;
+ mlx5_mr_dump_cache;
+ mlx5_mr_rebuild_cache;
+ mlx5_mr_insert_cache;
+ mlx5_mr_lookup_cache;
+ mlx5_mr_lookup_list;
+ mlx5_mr_create_primary;
+ mlx5_mr_flush_local_cache;
mlx5_nl_allmulti;
mlx5_nl_devlink_family_id_get;
mlx5_nl_vlan_vmwa_delete;
mlx5_translate_port_name;
-
};
-EXPERIMENTAL {
- global:
-
- mlx5_mp_init_primary;
- mlx5_mp_uninit_primary;
- mlx5_mp_init_secondary;
- mlx5_mp_uninit_secondary;
- mlx5_mp_req_mr_create;
- mlx5_mp_req_queue_state_modify;
- mlx5_mp_req_verbs_cmd_fd;
-
- mlx5_mr_btree_init;
- mlx5_mr_btree_free;
- mlx5_mr_btree_dump;
- mlx5_mr_addr2mr_bh;
- mlx5_mr_release_cache;
- mlx5_mr_dump_cache;
- mlx5_mr_rebuild_cache;
- mlx5_mr_insert_cache;
- mlx5_mr_lookup_cache;
- mlx5_mr_lookup_list;
- mlx5_create_mr_ext;
- mlx5_mr_create_primary;
- mlx5_mr_flush_local_cache;
-};