pipeline: introduce SWX and instruction

The and (i.e. bitwise and) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c
index 364c7d7..fe44e52 100644 (file)
--- a/lib/librte_pipeline/rte_swx_pipeline.c
+++ b/lib/librte_pipeline/rte_swx_pipeline.c
@@ -303,6 +303,14 @@ enum instruction_type {
         * dst = H, src = H
         */
        INSTR_ALU_CKSUB_FIELD,
+
+       /* and dst src
+        * dst &= src
+        * dst = HMEF, src = HMEFTI
+        */
+       INSTR_ALU_AND,   /* dst = MEF, src = MEFT */
+       INSTR_ALU_AND_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */
+       INSTR_ALU_AND_I, /* dst = HMEF, src = I */
 };
 
 struct instr_operand {
@@ -3070,6 +3078,55 @@ instr_alu_cksub_translate(struct rte_swx_pipeline *p,
        return 0;
 }
 
+static int
+instr_alu_and_translate(struct rte_swx_pipeline *p,
+                       struct action *action,
+                       char **tokens,
+                       int n_tokens,
+                       struct instruction *instr,
+                       struct instruction_data *data __rte_unused)
+{
+       char *dst = tokens[1], *src = tokens[2];
+       struct field *fdst, *fsrc;
+       uint32_t dst_struct_id, src_struct_id, src_val;
+
+       CHECK(n_tokens == 3, EINVAL);
+
+       fdst = struct_field_parse(p, NULL, dst, &dst_struct_id);
+       CHECK(fdst, EINVAL);
+
+       /* AND or AND_S. */
+       fsrc = struct_field_parse(p, action, src, &src_struct_id);
+       if (fsrc) {
+               instr->type = INSTR_ALU_AND;
+               if ((dst[0] == 'h' && src[0] != 'h') ||
+                   (dst[0] != 'h' && src[0] == 'h'))
+                       instr->type = INSTR_ALU_AND_S;
+
+               instr->alu.dst.struct_id = (uint8_t)dst_struct_id;
+               instr->alu.dst.n_bits = fdst->n_bits;
+               instr->alu.dst.offset = fdst->offset / 8;
+               instr->alu.src.struct_id = (uint8_t)src_struct_id;
+               instr->alu.src.n_bits = fsrc->n_bits;
+               instr->alu.src.offset = fsrc->offset / 8;
+               return 0;
+       }
+
+       /* AND_I. */
+       src_val = strtoul(src, &src, 0);
+       CHECK(!src[0], EINVAL);
+
+       if (dst[0] == 'h')
+               src_val = htonl(src_val);
+
+       instr->type = INSTR_ALU_AND_I;
+       instr->alu.dst.struct_id = (uint8_t)dst_struct_id;
+       instr->alu.dst.n_bits = fdst->n_bits;
+       instr->alu.dst.offset = fdst->offset / 8;
+       instr->alu.src_val = (uint32_t)src_val;
+       return 0;
+}
+
 static inline void
 instr_alu_add_exec(struct rte_swx_pipeline *p)
 {
@@ -3250,6 +3307,51 @@ instr_alu_sub_hi_exec(struct rte_swx_pipeline *p)
        thread_ip_inc(p);
 }
 
+static inline void
+instr_alu_and_exec(struct rte_swx_pipeline *p)
+{
+       struct thread *t = &p->threads[p->thread_id];
+       struct instruction *ip = t->ip;
+
+       TRACE("[Thread %2u] and\n", p->thread_id);
+
+       /* Structs. */
+       ALU(t, ip, &);
+
+       /* Thread. */
+       thread_ip_inc(p);
+}
+
+static inline void
+instr_alu_and_s_exec(struct rte_swx_pipeline *p)
+{
+       struct thread *t = &p->threads[p->thread_id];
+       struct instruction *ip = t->ip;
+
+       TRACE("[Thread %2u] and (s)\n", p->thread_id);
+
+       /* Structs. */
+       ALU_S(t, ip, &);
+
+       /* Thread. */
+       thread_ip_inc(p);
+}
+
+static inline void
+instr_alu_and_i_exec(struct rte_swx_pipeline *p)
+{
+       struct thread *t = &p->threads[p->thread_id];
+       struct instruction *ip = t->ip;
+
+       TRACE("[Thread %2u] and (i)\n", p->thread_id);
+
+       /* Structs. */
+       ALU_I(t, ip, &);
+
+       /* Thread. */
+       thread_ip_inc(p);
+}
+
 static inline void
 instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p)
 {
@@ -3617,6 +3719,14 @@ instr_translate(struct rte_swx_pipeline *p,
                                                 instr,
                                                 data);
 
+       if (!strcmp(tokens[tpos], "and"))
+               return instr_alu_and_translate(p,
+                                              action,
+                                              &tokens[tpos],
+                                              n_tokens - tpos,
+                                              instr,
+                                              data);
+
        CHECK(0, EINVAL);
 }
 
@@ -3793,6 +3903,10 @@ static instr_exec_t instruction_table[] = {
        [INSTR_ALU_CKADD_STRUCT] = instr_alu_ckadd_struct_exec,
        [INSTR_ALU_CKADD_STRUCT20] = instr_alu_ckadd_struct20_exec,
        [INSTR_ALU_CKSUB_FIELD] = instr_alu_cksub_field_exec,
+
+       [INSTR_ALU_AND] = instr_alu_and_exec,
+       [INSTR_ALU_AND_S] = instr_alu_and_s_exec,
+       [INSTR_ALU_AND_I] = instr_alu_and_i_exec,
 };
 
 static inline void