uint64_t input_set;
uint64_t outer_input_set; /* only for tunnel packets outer fields */
+ uint32_t mark_flag;
};
#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
bool is_safe_mode;
struct ice_devargs devargs;
enum ice_pkg_type active_pkg_type; /* loaded ddp package type */
+ uint16_t fdir_ref_cnt;
};
struct ice_vsi_vlan_pvid_info {
goto free_counter;
}
+ if (filter->mark_flag == 1)
+ ice_fdir_rx_parsing_enable(ad, 1);
+
rte_memcpy(entry, filter, sizeof(*entry));
ret = ice_fdir_entry_insert(pf, entry, &key);
if (ret) {
}
ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);
+
+ if (filter->mark_flag == 1)
+ ice_fdir_rx_parsing_enable(ad, 0);
+
flow->rule = NULL;
rte_free(filter);
break;
case RTE_FLOW_ACTION_TYPE_MARK:
mark_num++;
-
+ filter->mark_flag = 1;
mark_spec = actions->conf;
filter->input.fltr_id = mark_spec->id;
filter->input.fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ONE;
uint8_t port_id; /* device port ID */
uint8_t crc_len; /* 0 if CRC stripped, 4 otherwise */
+ uint8_t fdir_enabled; /* 0 if FDIR disabled, 1 when enabled */
uint16_t queue_id; /* RX queue index */
uint16_t reg_idx; /* RX queue register index */
uint8_t drop_en; /* if not 0, set register bit */
int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);
int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);
+#define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \
+ int i; \
+ for (i = 0; i < (ad)->eth_dev->data->nb_rx_queues; i++) { \
+ struct ice_rx_queue *rxq = (ad)->eth_dev->data->rx_queues[i]; \
+ if (!rxq) \
+ continue; \
+ rxq->fdir_enabled = on; \
+ } \
+ PMD_DRV_LOG(DEBUG, "FDIR processing on RX set to %d", on); \
+} while (0)
+
+/* Enable/disable flow director parsing from Rx descriptor in data path. */
+static inline
+void ice_fdir_rx_parsing_enable(struct ice_adapter *ad, bool on)
+{
+ if (on) {
+ /* Enable flow director parsing from Rx descriptor */
+ FDIR_PARSING_ENABLE_PER_QUEUE(ad, on);
+ ad->fdir_ref_cnt++;
+ } else {
+ if (ad->fdir_ref_cnt >= 1) {
+ ad->fdir_ref_cnt--;
+
+ if (ad->fdir_ref_cnt == 0)
+ FDIR_PARSING_ENABLE_PER_QUEUE(ad, on);
+ }
+ }
+}
+
#endif /* _ICE_RXTX_H_ */