net/mlx5: enable DevX Tx queue creation

Verbs API does not support Infiniband device port number larger 255 by
design. To support more representors on a single Infiniband device DevX
API should be engaged.

While creating Send Queue (SQ) object with Verbs API, the PMD assigned
IB device port attribute and kernel created the default miss flows in
FDB domain, to redirect egress traffic from the queue being created to
representor appropriate peer (wire, HPF, VF or SF).

With DevX API there is no IB-device port attribute (it is merely kernel
one, DevX operates in PRM terms) and PMD must create default miss flows
in FDB explicitly. PMD did not provide this and using DevX API for
E-Switch configurations was disabled.

The default miss FDB flow matches E-Switch manager vport (to make sure
the source is some representor) and SQn (Send Queue number - device
internal queue index). The root flow table managed by kernel/firmware
and it does not support vport redirect action, we have to split the
default miss flow into two ones:

- flow with lowest priority in the root table that matches E-Switch
manager vport ID and jump to group 1.
- flow in group 1 that matches E-Switch manager vport ID and SQn and
forwards packet to peer vport

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index b1212667eea4989e84db3b5a9517ecad8dd72fe8..0ab6d555fbfa6ed7d5f6855602fbfc57a53be297 100644 (file)
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -646,56 +646,6 @@ out:
        return ret;
 }
 
-/**
- * Create the Tx queue DevX/Verbs object.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param idx
- *   Queue index in DPDK Tx queue array.
- *
- * @return
- *   0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
-{
-       struct mlx5_priv *priv = dev->data->dev_private;
-       struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
-       struct mlx5_txq_ctrl *txq_ctrl =
-                       container_of(txq_data, struct mlx5_txq_ctrl, txq);
-
-       if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
-               return mlx5_txq_devx_obj_new(dev, idx);
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-       if (!priv->config.dv_esw_en)
-               return mlx5_txq_devx_obj_new(dev, idx);
-#endif
-       return mlx5_txq_ibv_obj_new(dev, idx);
-}
-
-/**
- * Release an Tx DevX/verbs queue object.
- *
- * @param txq_obj
- *   DevX/Verbs Tx queue object.
- */
-static void
-mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
-{
-       if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
-               mlx5_txq_devx_obj_release(txq_obj);
-               return;
-       }
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-       if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
-               mlx5_txq_devx_obj_release(txq_obj);
-               return;
-       }
-#endif
-       mlx5_txq_ibv_obj_release(txq_obj);
-}
-
 /**
  * DV flow counter mode detect and config.
  *
@@ -1745,16 +1695,6 @@ err_secondary:
                                                ibv_obj_ops.drop_action_create;
                priv->obj_ops.drop_action_destroy =
                                                ibv_obj_ops.drop_action_destroy;
-#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
-               priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
-#else
-               if (config->dv_esw_en)
-                       priv->obj_ops.txq_obj_modify =
-                                               ibv_obj_ops.txq_obj_modify;
-#endif
-               /* Use specific wrappers for Tx object. */
-               priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
-               priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
                mlx5_queue_counter_id_prepare(eth_dev);
                priv->obj_ops.lb_dummy_queue_create =
                                        mlx5_rxq_ibv_obj_dummy_lb_create;
@@ -1765,7 +1705,7 @@ err_secondary:
        }
        if (config->tx_pp &&
            (priv->config.dv_esw_en ||
-            priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
+            priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
                /*
                 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
                 * packet pacing and already checked above.

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 6f5a78b249361f452c30cbd56934393536d40d9f..adef86d3ae06defef050ad5ba4807a5df7995479 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1664,6 +1664,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
                   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+                                           uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
                                       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);

diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 6b6b9c77ae49fe78bd49e98c971948448da10944..9050a32eb1c1381675635dc62307b9f7bee6caec 100644 (file)
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -102,9 +102,9 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, uint8_t type)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static int
-mlx5_devx_modify_sq(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
-                   uint8_t dev_port)
+int
+mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
+                    uint8_t dev_port)
 {
        struct mlx5_devx_modify_sq_attr msq_attr = { 0 };
        int ret;
@@ -1121,7 +1121,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
        *txq_data->qp_db = 0;
        txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
        /* Change Send Queue state to Ready-to-Send. */
-       ret = mlx5_devx_modify_sq(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+       ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
        if (ret) {
                rte_errno = errno;
                DRV_LOG(ERR,
@@ -1190,7 +1190,7 @@ struct mlx5_obj_ops devx_obj_ops = {
        .drop_action_create = mlx5_devx_drop_action_create,
        .drop_action_destroy = mlx5_devx_drop_action_destroy,
        .txq_obj_new = mlx5_txq_devx_obj_new,
-       .txq_obj_modify = mlx5_devx_modify_sq,
+       .txq_obj_modify = mlx5_txq_devx_modify,
        .txq_obj_release = mlx5_txq_devx_obj_release,
        .lb_dummy_queue_create = NULL,
        .lb_dummy_queue_release = NULL,

diff --git a/drivers/net/mlx5/mlx5_devx.h b/drivers/net/mlx5/mlx5_devx.h
index bc8a8d6b73cf9cdd3910d346d3f472f72f401101..a95207a6b9a60fa5b34168ddcfc58de9f0cd364c 100644 (file)
--- a/drivers/net/mlx5/mlx5_devx.h
+++ b/drivers/net/mlx5/mlx5_devx.h
@@ -8,6 +8,8 @@
 #include "mlx5.h"
 
 int mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx);
+int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
+                        enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
 
 extern struct mlx5_obj_ops devx_obj_ops;

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 4abeae8ce2d7c8433fbb464dbb8022d43b044fb2..1d493f12075b051714964cd17aabcfee3432059d 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -6596,6 +6596,80 @@ mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
                                                   actions, false, &error);
 }
 
+/**
+ * Create a dedicated flow rule on e-switch table 1, matches ESW manager
+ * and sq number, directs all packets to peer vport.
+ *
+ * @param dev
+ *   Pointer to Ethernet device.
+ * @param txq
+ *   Txq index.
+ *
+ * @return
+ *   Flow ID on success, 0 otherwise and rte_errno is set.
+ */
+uint32_t
+mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
+{
+       struct rte_flow_attr attr = {
+               .group = 0,
+               .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
+               .ingress = 1,
+               .egress = 0,
+               .transfer = 1,
+       };
+       struct rte_flow_item_port_id port_spec = {
+               .id = MLX5_PORT_ESW_MGR,
+       };
+       struct mlx5_rte_flow_item_tx_queue txq_spec = {
+               .queue = txq,
+       };
+       struct rte_flow_item pattern[] = {
+               {
+                       .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
+                       .spec = &port_spec,
+               },
+               {
+                       .type = (enum rte_flow_item_type)
+                               MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
+                       .spec = &txq_spec,
+               },
+               {
+                       .type = RTE_FLOW_ITEM_TYPE_END,
+               },
+       };
+       struct rte_flow_action_jump jump = {
+               .group = 1,
+       };
+       struct rte_flow_action_port_id port = {
+               .id = dev->data->port_id,
+       };
+       struct rte_flow_action actions[] = {
+               {
+                       .type = RTE_FLOW_ACTION_TYPE_JUMP,
+                       .conf = &jump,
+               },
+               {
+                       .type = RTE_FLOW_ACTION_TYPE_END,
+               },
+       };
+       struct rte_flow_error error;
+
+       /*
+        * Creates group 0, highest priority jump flow.
+        * Matches txq to bypass kernel packets.
+        */
+       if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
+                            false, &error) == 0)
+               return 0;
+       /* Create group 1, lowest priority redirect flow for txq. */
+       attr.group = 1;
+       actions[0].conf = &port;
+       actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
+       return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
+                               actions, false, &error);
+}
+
 /**
  * Validate a flow supported by the NIC.
  *

diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index 54c28934372eb7935d9aa39761d5dcd4899b754a..ca43bd51aab27fcede21611dcdeb246a5580c11a 100644 (file)
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -1308,9 +1308,18 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                                goto error;
                        }
                }
+               if ((priv->representor || priv->master) &&
+                   priv->config.dv_esw_en) {
+                       if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
+                               DRV_LOG(ERR,
+                                       "Port %u Tx queue %u SQ create representor devx default miss rule failed.",
+                                       dev->data->port_id, i);
+                               goto error;
+                       }
+               }
                mlx5_txq_release(dev, i);
        }
-       if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
+       if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
                if (mlx5_flow_create_esw_table_zero_flow(dev))
                        priv->fdb_def_rule = 1;
                else