]> git.droids-corp.org - dpdk.git/commitdiff
net/ngbe: support YT PHY SGMII to RGMII mode
authorJiawen Wu <jiawenwu@trustnetic.com>
Wed, 22 Jun 2022 06:56:13 +0000 (14:56 +0800)
committerFerruh Yigit <ferruh.yigit@xilinx.com>
Wed, 22 Jun 2022 10:32:41 +0000 (12:32 +0200)
Add SGMII to RGMII mode for yt8521s and yt8531s PHY.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
doc/guides/rel_notes/release_22_07.rst
drivers/net/ngbe/base/ngbe_phy_yt.c

index f79451a3323d30687cc41be4a2262021c7e9252a..d2504bb9cdf187154b2866e7e9a897cff2aea34c 100644 (file)
@@ -178,6 +178,7 @@ New Features
   * Added support for yt8531s PHY.
   * Added support for OEM subsystem vendor ID.
   * Added autoneg on/off for external PHY SFI mode.
+  * Added support for yt8521s/yt8531s PHY SGMII to RGMII mode.
 
 * **Updated Wangxun txgbe driver.**
 
index bc1921e68ab98a7b4172525f5c1d84b3168aa422..562a0dede50996b905adfa2f2cc77255235c862d 100644 (file)
@@ -298,6 +298,55 @@ skip_an:
                value &= ~YT_SMI_PHY_SW_RST;
                ngbe_write_phy_reg_ext_yt(hw, YT_CHIP, 0, value);
 
+               hw->phy.set_phy_power(hw, true);
+       } else if ((value & YT_CHIP_MODE_MASK) == YT_CHIP_MODE_SEL(5)) {
+               /* sgmii_to_rgmii */
+               if (!hw->mac.autoneg) {
+                       switch (speed) {
+                       case NGBE_LINK_SPEED_1GB_FULL:
+                               value = YT_BCR_SPEED_SELECT1;
+                               break;
+                       case NGBE_LINK_SPEED_100M_FULL:
+                               value = YT_BCR_SPEED_SELECT0;
+                               break;
+                       case NGBE_LINK_SPEED_10M_FULL:
+                               value = 0;
+                               break;
+                       default:
+                               value = YT_BCR_SPEED_SELECT0 |
+                                       YT_BCR_SPEED_SELECT1;
+                               DEBUGOUT("unknown speed = 0x%x", speed);
+                               break;
+                       }
+                       /* duplex full */
+                       value |= YT_BCR_DUPLEX | YT_BCR_RESET;
+                       hw->phy.write_reg(hw, YT_BCR, 0, value);
+
+                       goto skip_an_sr;
+               }
+
+               value = 0;
+               if (speed & NGBE_LINK_SPEED_1GB_FULL) {
+                       hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_1GB_FULL;
+                       value |= YT_BCR_SPEED_SELECT1;
+               }
+               if (speed & NGBE_LINK_SPEED_100M_FULL) {
+                       hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_100M_FULL;
+                       value |= YT_BCR_SPEED_SELECT0;
+               }
+               if (speed & NGBE_LINK_SPEED_10M_FULL)
+                       hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_10M_FULL;
+
+               /* duplex full */
+               value |= YT_BCR_DUPLEX | YT_BCR_RESET;
+               hw->phy.write_reg(hw, YT_BCR, 0, value);
+
+               /* software reset to make the above configuration take effect */
+               hw->phy.read_reg(hw, YT_BCR, 0, &value);
+               value |= YT_BCR_RESET | YT_BCR_ANE | YT_BCR_RESTART_AN;
+               hw->phy.write_reg(hw, 0x0, 0, value);
+
+skip_an_sr:
                hw->phy.set_phy_power(hw, true);
        }