ixgbe/base: release X540 semaphores in proper order

Because we acquire two semaphore bits before setting the SWFW_SYNC
register, we should release them in the reverse order that they
were acquired.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>

diff --git a/drivers/net/ixgbe/base/ixgbe_x540.c b/drivers/net/ixgbe/base/ixgbe_x540.c
index af29b13..4891702 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_x540.c
+++ b/drivers/net/ixgbe/base/ixgbe_x540.c
@@ -931,14 +931,14 @@ STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
 
        /* Release both semaphores by writing 0 to the bits REGSMP and SMBI */
 
-       swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
-       swsm &= ~IXGBE_SWSM_SMBI;
-       IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
-
        swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
        swsm &= ~IXGBE_SWFW_REGSMP;
        IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);
 
+       swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
+       swsm &= ~IXGBE_SWSM_SMBI;
+       IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
+
        IXGBE_WRITE_FLUSH(hw);
 }