net/mlx5: fix secondary process initialization ordering
authorChengwen Feng <fengchengwen@huawei.com>
Mon, 10 May 2021 12:06:03 +0000 (20:06 +0800)
committerThomas Monjalon <thomas@monjalon.net>
Wed, 12 May 2021 08:52:31 +0000 (10:52 +0200)
The memory barrier is used to ensure that the response is returned
only after the Tx/Rx function is set, it should place after the Rx/Tx
function is set.

Fixes: 2aac5b5d119f ("net/mlx5: sync stop/start with secondary process")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/linux/mlx5_mp_os.c

index ca529b6..3a4aa76 100644 (file)
@@ -132,7 +132,6 @@ struct rte_mp_msg mp_res;
        switch (param->type) {
        case MLX5_MP_REQ_START_RXTX:
                DRV_LOG(INFO, "port %u starting datapath", dev->data->port_id);
-               rte_mb();
                dev->rx_pkt_burst = mlx5_select_rx_function(dev);
                dev->tx_pkt_burst = mlx5_select_tx_function(dev);
                ppriv = (struct mlx5_proc_priv *)dev->process_private;
@@ -149,6 +148,7 @@ struct rte_mp_msg mp_res;
                                return -rte_errno;
                        }
                }
+               rte_mb();
                mp_init_msg(&priv->mp_id, &mp_res, param->type);
                res->result = 0;
                ret = rte_mp_reply(&mp_res, peer);