net/ice/base: adjust scheduler default bandwidth weight

By default the queues are configured in legacy mode. The default
bandwidth settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommended default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d02a047..54112e8 100644 (file)
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4012,7 +4012,18 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
         * Without setting the generic section as valid in valid_sections, the
         * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
         */
-       buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
+       buf->txqs[0].info.valid_sections =
+               ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
+               ICE_AQC_ELEM_VALID_EIR;
+       buf->txqs[0].info.generic = 0;
+       buf->txqs[0].info.cir_bw.bw_profile_idx =
+               CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+       buf->txqs[0].info.cir_bw.bw_alloc =
+               CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
+       buf->txqs[0].info.eir_bw.bw_profile_idx =
+               CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+       buf->txqs[0].info.eir_bw.bw_alloc =
+               CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
 
        /* add the LAN queue */
        status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);

diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index a6dece9..41a1912 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -610,7 +610,7 @@ enum ice_rl_type {
 #define ICE_SCHED_NO_BW_WT             0
 #define ICE_SCHED_DFLT_RL_PROF_ID      0
 #define ICE_SCHED_NO_SHARED_RL_PROF_ID 0xFFFF
-#define ICE_SCHED_DFLT_BW_WT           1
+#define ICE_SCHED_DFLT_BW_WT           4
 #define ICE_SCHED_INVAL_PROF_ID                0xFFFF
 #define ICE_SCHED_DFLT_BURST_SIZE      (15 * 1024)     /* in bytes (15k) */