net/cnxk: fix PFC class disabling

Disabling a specific PFC class on a SQ is resulting in disabling PFC
on the entire port.

Fixes: 9544713564f5 ("net/cnxk: support priority flow control")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>

diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 941b2706a947362e4130195974f53f7f1135743e..4ea1617b1f764913d143d903d7d062072b208acc 100644 (file)
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -439,6 +439,7 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
        sq->qid = qid;
        sq->nb_desc = nb_desc;
        sq->max_sqe_sz = nix_sq_max_sqe_sz(dev);
+       sq->tc = ROC_NIX_PFC_CLASS_INVALID;
 
        rc = roc_nix_sq_init(&dev->nix, sq);
        if (rc) {
@@ -1281,8 +1282,6 @@ skip_lbk_setup:
                goto cq_fini;
        }
 
-       /* Initialize TC to SQ mapping as invalid */
-       memset(dev->pfc_tc_sq_map, 0xFF, sizeof(dev->pfc_tc_sq_map));
        /*
         * Restore queue config when reconfigure followed by
         * reconfigure and no queue configure invoked from application case.
@@ -1794,17 +1793,17 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool reset)
        rc = cnxk_nix_flow_ctrl_set(eth_dev, &fc_conf);
 
        pfc_conf.mode = RTE_ETH_FC_NONE;
-       for (i = 0; i < CNXK_NIX_PFC_CHAN_COUNT; i++) {
-               if (dev->pfc_tc_sq_map[i] != 0xFFFF) {
-                       pfc_conf.rx_pause.tx_qid = dev->pfc_tc_sq_map[i];
-                       pfc_conf.rx_pause.tc = i;
-                       pfc_conf.tx_pause.tc = i;
-                       rc = cnxk_nix_priority_flow_ctrl_queue_config(eth_dev,
-                               &pfc_conf);
-                       if (rc)
-                               plt_err("Failed to reset PFC. error code(%d)",
-                                       rc);
-               }
+       for (i = 0; i < RTE_MAX(eth_dev->data->nb_rx_queues,
+                               eth_dev->data->nb_tx_queues);
+            i++) {
+               pfc_conf.rx_pause.tc = ROC_NIX_PFC_CLASS_INVALID;
+               pfc_conf.rx_pause.tx_qid = i;
+               pfc_conf.tx_pause.tc = ROC_NIX_PFC_CLASS_INVALID;
+               pfc_conf.tx_pause.rx_qid = i;
+               rc = cnxk_nix_priority_flow_ctrl_queue_config(eth_dev,
+                                                             &pfc_conf);
+               if (rc)
+                       plt_err("Failed to reset PFC. error code(%d)", rc);
        }
 
        /* Disable and free rte_meter entries */

diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index db2d8498c3505c5f26df4af373f2a76dd367d74e..a4e96f07c149d35921f8050d22ee3a6995859944 100644 (file)
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -396,7 +396,6 @@ struct cnxk_eth_dev {
        struct cnxk_eth_qconf *rx_qconf;
 
        /* Flow control configuration */
-       uint16_t pfc_tc_sq_map[CNXK_NIX_PFC_CHAN_COUNT];
        struct cnxk_pfc_cfg pfc_cfg;
        struct cnxk_fc_cfg fc_cfg;
 

diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c
index caace9dbd1961196f1c576e67fb941b4f1fadf5f..1592971073cb002e3760c28ec8da2d694ae9b1f8 100644 (file)
--- a/drivers/net/cnxk/cnxk_ethdev_ops.c
+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
@@ -1129,8 +1129,10 @@ nix_priority_flow_ctrl_sq_conf(struct rte_eth_dev *eth_dev, uint16_t qid,
        struct rte_eth_dev_data *data = eth_dev->data;
        struct cnxk_pfc_cfg *pfc = &dev->pfc_cfg;
        struct roc_nix *nix = &dev->nix;
+       struct roc_nix_pfc_cfg pfc_cfg;
        struct roc_nix_fc_cfg fc_cfg;
        struct cnxk_eth_txq_sp *txq;
+       enum roc_nix_fc_mode mode;
        struct roc_nix_sq *sq;
        int rc;
 
@@ -1140,12 +1142,6 @@ nix_priority_flow_ctrl_sq_conf(struct rte_eth_dev *eth_dev, uint16_t qid,
        if (qid >= eth_dev->data->nb_tx_queues)
                return -ENOTSUP;
 
-       if (dev->pfc_tc_sq_map[tc] != 0xFFFF &&
-           dev->pfc_tc_sq_map[tc] != qid) {
-               plt_err("Same TC can not be configured on multiple SQs");
-               return -ENOTSUP;
-       }
-
        /* Check if RX pause frame is enabled or not */
        if (!pfc->rx_pause_en) {
                if ((roc_nix_tm_tree_type_get(nix) == ROC_NIX_TM_DEFAULT) &&
@@ -1180,7 +1176,31 @@ nix_priority_flow_ctrl_sq_conf(struct rte_eth_dev *eth_dev, uint16_t qid,
        if (rc)
                return rc;
 
-       dev->pfc_tc_sq_map[tc] = sq->qid;
+       /* Maintaining a count for SQs which are configured for PFC. This is
+        * required to handle disabling of a particular SQ without affecting
+        * PFC on other SQs.
+        */
+       if (!fc_cfg.tm_cfg.enable && sq->tc != ROC_NIX_PFC_CLASS_INVALID) {
+               sq->tc = ROC_NIX_PFC_CLASS_INVALID;
+               pfc->rx_pause_en--;
+       } else if (fc_cfg.tm_cfg.enable &&
+                  sq->tc == ROC_NIX_PFC_CLASS_INVALID) {
+               sq->tc = tc;
+               pfc->rx_pause_en++;
+       }
+
+       if (pfc->rx_pause_en > 1)
+               goto exit;
+
+       if (pfc->tx_pause_en)
+               mode = pfc->rx_pause_en ? ROC_NIX_FC_FULL : ROC_NIX_FC_TX;
+       else
+               mode = pfc->rx_pause_en ? ROC_NIX_FC_RX : ROC_NIX_FC_NONE;
+
+       memset(&pfc_cfg, 0, sizeof(struct roc_nix_pfc_cfg));
+       pfc_cfg.mode = mode;
+       pfc_cfg.tc = pfc->class_en;
+       rc = roc_nix_pfc_mode_set(nix, &pfc_cfg);
 exit:
        return rc;
 }