config: clean cache line size selection scheme

by default, all the targets will be configured with the 64-byte cache line
size, targets which have different cache line size can be overridden
through target specific config file.

Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets
based on existing configuration.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>

diff --git a/config/common_bsdapp b/config/common_bsdapp
index be09b48794ca2defad106f425f6183e5dc13e1a7..696382ce2bec40338aac40916bbc18b9b3fc981b 100644 (file)
--- a/config/common_bsdapp
+++ b/config/common_bsdapp
@@ -83,6 +83,11 @@ CONFIG_RTE_BUILD_COMBINE_LIBS=n
 #
 CONFIG_RTE_NEXT_ABI=y
 
+#
+# Machine's cache line size
+#
+CONFIG_RTE_CACHE_LINE_SIZE=64
+
 #
 # Compile Environment Abstraction Layer
 #

diff --git a/config/common_linuxapp b/config/common_linuxapp
index bf1bb6e8bf5dba5dbf8a07e6c766fecff46bc7e4..f1638dbbd0302bd9b37eb82f4988e98b0d74a39d 100644 (file)
--- a/config/common_linuxapp
+++ b/config/common_linuxapp
@@ -83,6 +83,11 @@ CONFIG_RTE_BUILD_COMBINE_LIBS=n
 #
 CONFIG_RTE_NEXT_ABI=y
 
+#
+# Machine's cache line size
+#
+CONFIG_RTE_CACHE_LINE_SIZE=64
+
 #
 # Compile Environment Abstraction Layer
 #
@@ -100,7 +105,6 @@ CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
 CONFIG_RTE_EAL_IGB_UIO=y
 CONFIG_RTE_EAL_VFIO=y
 CONFIG_RTE_MALLOC_DEBUG=n
-
 # Default driver path (or "" to disable)
 CONFIG_RTE_EAL_PMD_PATH=""
 

diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc
index 504f3edff185e68ee0700aa6ec02632c63e4354d..eacd01c14e3e33a7beac2c5b288e75490bf599a2 100644 (file)
--- a/config/defconfig_arm64-armv8a-linuxapp-gcc
+++ b/config/defconfig_arm64-armv8a-linuxapp-gcc
@@ -43,8 +43,6 @@ CONFIG_RTE_FORCE_INTRINSICS=y
 CONFIG_RTE_TOOLCHAIN="gcc"
 CONFIG_RTE_TOOLCHAIN_GCC=y
 
-CONFIG_RTE_CACHE_LINE_SIZE=64
-
 CONFIG_RTE_IXGBE_INC_VECTOR=n
 CONFIG_RTE_LIBRTE_VIRTIO_PMD=n
 CONFIG_RTE_LIBRTE_IVSHMEM=n

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 03760c493ffb47cfbef6e03b2ca6e74ef3a1c134..a80a19e2c0c1057db35742a0ce5858ab87d3d1a3 100644 (file)
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -36,6 +36,8 @@ CONFIG_RTE_ARCH="ppc_64"
 CONFIG_RTE_ARCH_PPC_64=y
 CONFIG_RTE_ARCH_64=y
 
+CONFIG_RTE_CACHE_LINE_SIZE=128
+
 CONFIG_RTE_TOOLCHAIN="gcc"
 CONFIG_RTE_TOOLCHAIN_GCC=y
 

diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h
index 587a25dfa7885ba9d9ed5b1857d0c144b258f899..2200d58c2fdcdc9fcd9d15ec79a7ef022a7373b5 100644 (file)
--- a/lib/librte_eal/common/include/rte_memory.h
+++ b/lib/librte_eal/common/include/rte_memory.h
@@ -68,9 +68,6 @@ enum rte_page_sizes {
 };
 
 #define SOCKET_ID_ANY -1                    /**< Any NUMA socket. */
-#ifndef RTE_CACHE_LINE_SIZE
-#define RTE_CACHE_LINE_SIZE 64                  /**< Cache line size. */
-#endif
 #define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
 
 #define RTE_CACHE_LINE_ROUNDUP(size) \

diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_kni_common.h b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_kni_common.h
index bd1cc094ea7a1aff78dce0111a4e78a09d0c8906..815abd67400c7a19771b217381cb1497477cf915 100644 (file)
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_kni_common.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_kni_common.h
@@ -68,10 +68,6 @@
  */
 #define RTE_KNI_NAMESIZE 32
 
-#ifndef RTE_CACHE_LINE_SIZE
-#define RTE_CACHE_LINE_SIZE 64       /**< Cache line size. */
-#endif
-
 /*
  * Request id.
  */

diff --git a/mk/arch/arm/rte.vars.mk b/mk/arch/arm/rte.vars.mk
index df0c0436764b507309cc56fd786cf61dabdb16a6..bd85140e08590457071d980fd4d7e27ef50f94da 100644 (file)
--- a/mk/arch/arm/rte.vars.mk
+++ b/mk/arch/arm/rte.vars.mk
@@ -32,7 +32,7 @@
 ARCH  ?= arm
 CROSS ?=
 
-CPU_CFLAGS  ?= -marm -DRTE_CACHE_LINE_SIZE=64 -munaligned-access
+CPU_CFLAGS  ?= -marm -munaligned-access
 CPU_LDFLAGS ?=
 CPU_ASFLAGS ?= -felf
 

diff --git a/mk/arch/ppc_64/rte.vars.mk b/mk/arch/ppc_64/rte.vars.mk
index fdba01988398fb5b68f8765ddf943f95e42065ba..363fcd14b9760bbe5dde598a843fde64d6483bc4 100644 (file)
--- a/mk/arch/ppc_64/rte.vars.mk
+++ b/mk/arch/ppc_64/rte.vars.mk
@@ -32,7 +32,7 @@
 ARCH  ?= powerpc
 CROSS ?=
 
-CPU_CFLAGS  ?= -m64 -DRTE_CACHE_LINE_SIZE=128
+CPU_CFLAGS  ?= -m64
 CPU_LDFLAGS ?=
 CPU_ASFLAGS ?= -felf64
 

diff --git a/mk/machine/armv8a/rte.vars.mk b/mk/machine/armv8a/rte.vars.mk
index 8c018a440518535e0d464e11a665203008984468..d5049e1f13da078b3461585c498127c041dfb3d6 100644 (file)
--- a/mk/machine/armv8a/rte.vars.mk
+++ b/mk/machine/armv8a/rte.vars.mk
@@ -55,4 +55,4 @@
 # CPU_LDFLAGS =
 # CPU_ASFLAGS =
 
-MACHINE_CFLAGS += -march=armv8-a+crc -DRTE_CACHE_LINE_SIZE=64
+MACHINE_CFLAGS += -march=armv8-a+crc

diff --git a/mk/machine/thunderx/rte.vars.mk b/mk/machine/thunderx/rte.vars.mk
index 0bb6b3d009b3261587163bc8c2fb8d55ede3b9fa..81da1b4cc7a8e4977fb48e163e5c7591eea24be4 100644 (file)
--- a/mk/machine/thunderx/rte.vars.mk
+++ b/mk/machine/thunderx/rte.vars.mk
@@ -55,4 +55,4 @@ CROSS ?= aarch64-thunderx-linux-gnu-
 # CPU_LDFLAGS =
 # CPU_ASFLAGS =
 
-MACHINE_CFLAGS += -march=armv8-a+crc -mcpu=thunderx -DRTE_CACHE_LINE_SIZE=128
+MACHINE_CFLAGS += -march=armv8-a+crc -mcpu=thunderx

diff --git a/mk/machine/xgene1/rte.vars.mk b/mk/machine/xgene1/rte.vars.mk
index bdf8c6b16b7fa789842da616571dd1ad70104873..419c234381fd3b5c10f57fe1cff3702d06f00d13 100644 (file)
--- a/mk/machine/xgene1/rte.vars.mk
+++ b/mk/machine/xgene1/rte.vars.mk
@@ -55,4 +55,4 @@
 # CPU_LDFLAGS =
 # CPU_ASFLAGS =
 
-MACHINE_CFLAGS += -march=armv8-a -DRTE_CACHE_LINE_SIZE=64
+MACHINE_CFLAGS += -march=armv8-a