{
return TXGBE_ERR_OPS_DUMMY;
}
+static inline s32 txgbe_get_phy_fw_version_dummy(struct txgbe_hw *TUP0,
+ u32 *TUP1)
+{
+ return TXGBE_ERR_OPS_DUMMY;
+}
static inline s32 txgbe_phy_read_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1,
u8 TUP2, u8 *TUP3)
{
hw->phy.setup_link = txgbe_phy_setup_link_dummy;
hw->phy.setup_link_speed = txgbe_phy_setup_link_speed_dummy;
hw->phy.check_link = txgbe_phy_check_link_dummy;
+ hw->phy.get_fw_version = txgbe_get_phy_fw_version_dummy;
hw->phy.read_i2c_byte = txgbe_phy_read_i2c_byte_dummy;
hw->phy.write_i2c_byte = txgbe_phy_write_i2c_byte_dummy;
hw->phy.read_i2c_sff8472 = txgbe_phy_read_i2c_sff8472_dummy;
DEBUGFUNC("txgbe_init_hw");
+ /* Get firmware version */
+ hw->phy.get_fw_version(hw, &hw->fw_version);
+
/* Reset the hardware */
status = hw->mac.reset_hw(hw);
if (status == 0 || status == TXGBE_ERR_SFP_NOT_PRESENT) {
phy->write_reg_mdi = txgbe_write_phy_reg_mdi;
phy->setup_link = txgbe_setup_phy_link;
phy->setup_link_speed = txgbe_setup_phy_link_speed;
+ phy->get_fw_version = txgbe_get_phy_fw_version;
phy->read_i2c_byte = txgbe_read_i2c_byte;
phy->write_i2c_byte = txgbe_write_i2c_byte;
phy->read_i2c_sff8472 = txgbe_read_i2c_sff8472;
return 0;
}
+s32 txgbe_get_phy_fw_version(struct txgbe_hw *hw, u32 *fw_version)
+{
+ u16 eeprom_verh, eeprom_verl;
+
+ hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_H, &eeprom_verh);
+ hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_L, &eeprom_verl);
+
+ *fw_version = (eeprom_verh << 16) | eeprom_verl;
+
+ return 0;
+}
+
/**
* txgbe_get_copper_speeds_supported - Get copper link speeds from phy
* @hw: pointer to hardware structure
s32 txgbe_setup_phy_link_speed(struct txgbe_hw *hw,
u32 speed,
bool autoneg_wait_to_complete);
+s32 txgbe_get_phy_fw_version(struct txgbe_hw *hw, u32 *fw_version);
s32 txgbe_get_copper_link_capabilities(struct txgbe_hw *hw,
u32 *speed,
bool *autoneg);
s32 (*setup_link_speed)(struct txgbe_hw *hw, u32 speed,
bool autoneg_wait_to_complete);
s32 (*check_link)(struct txgbe_hw *hw, u32 *speed, bool *link_up);
+ s32 (*get_fw_version)(struct txgbe_hw *hw, u32 *fw_version);
s32 (*read_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data);
s32 (*write_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
u16 nb_rx_queues;
u16 nb_tx_queues;
+ u32 fw_version;
u32 mode;
enum txgbe_link_status {
TXGBE_LINK_STATUS_NONE = 0,
txgbe_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
- u16 eeprom_verh, eeprom_verl;
u32 etrack_id;
int ret;
- hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_H, &eeprom_verh);
- hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_L, &eeprom_verl);
+ hw->phy.get_fw_version(hw, &etrack_id);
- etrack_id = (eeprom_verh << 16) | eeprom_verl;
ret = snprintf(fw_version, fw_size, "0x%08x", etrack_id);
ret += 1; /* add the size of '\0' */