common/cnxk: increase sched weight and shaper burst limit

Increase sched weight and shaper burst limit for cn10k.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index bc908c2..d205438 100644 (file)
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -2134,8 +2134,9 @@ struct nix_lso_format {
                           0)
 
 /* NIX burst limits */
-#define NIX_TM_MAX_BURST_EXPONENT 0xf
-#define NIX_TM_MAX_BURST_MANTISSA 0xff
+#define NIX_TM_MAX_BURST_EXPONENT      0xful
+#define NIX_TM_MAX_BURST_MANTISSA      0x7ffful
+#define NIX_CN9K_TM_MAX_BURST_MANTISSA 0xfful
 
 /* NIX burst calculation
  *     PIR_BURST = ((256 + NIX_*_PIR[BURST_MANTISSA])
@@ -2147,7 +2148,7 @@ struct nix_lso_format {
  *                     / 256
  */
 #define NIX_TM_SHAPER_BURST(exponent, mantissa)                                \
-       (((256 + (mantissa)) << ((exponent) + 1)) / 256)
+       (((256ul + (mantissa)) << ((exponent) + 1)) / 256ul)
 
 /* Burst limit in Bytes */
 #define NIX_TM_MIN_SHAPER_BURST NIX_TM_SHAPER_BURST(0, 0)
@@ -2156,13 +2157,17 @@ struct nix_lso_format {
        NIX_TM_SHAPER_BURST(NIX_TM_MAX_BURST_EXPONENT,                         \
                            NIX_TM_MAX_BURST_MANTISSA)
 
+#define NIX_CN9K_TM_MAX_SHAPER_BURST                                           \
+       NIX_TM_SHAPER_BURST(NIX_TM_MAX_BURST_EXPONENT,                         \
+                           NIX_CN9K_TM_MAX_BURST_MANTISSA)
+
 /* Min is limited so that NIX_AF_SMQX_CFG[MINLEN]+ADJUST is not -ve */
 #define NIX_TM_LENGTH_ADJUST_MIN ((int)-NIX_MIN_HW_FRS + 1)
 #define NIX_TM_LENGTH_ADJUST_MAX 255
 
 #define NIX_TM_TLX_SP_PRIO_MAX    10
 #define NIX_CN9K_TM_RR_QUANTUM_MAX (BIT_ULL(24) - 1)
-#define NIX_TM_RR_QUANTUM_MAX     (BIT_ULL(14) - 1)
+#define NIX_TM_RR_WEIGHT_MAX      (BIT_ULL(14) - 1)
 
 /* [CN9K, CN10K) */
 #define NIX_CN9K_TXSCH_LVL_SMQ_MAX 512

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index ac7bd7e..90dc413 100644 (file)
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -277,6 +277,28 @@ enum roc_nix_lso_tun_type {
        ROC_NIX_LSO_TUN_MAX,
 };
 
+/* Restrict CN9K sched weight to have a minimum quantum */
+#define ROC_NIX_CN9K_TM_RR_WEIGHT_MAX 255u
+
+/* NIX TM Inlines */
+static inline uint64_t
+roc_nix_tm_max_sched_wt_get(void)
+{
+       if (roc_model_is_cn9k())
+               return ROC_NIX_CN9K_TM_RR_WEIGHT_MAX;
+       else
+               return NIX_TM_RR_WEIGHT_MAX;
+}
+
+static inline uint64_t
+roc_nix_tm_max_shaper_burst_get(void)
+{
+       if (roc_model_is_cn9k())
+               return NIX_CN9K_TM_MAX_SHAPER_BURST;
+       else
+               return NIX_TM_MAX_SHAPER_BURST;
+}
+
 /* Dev */
 int __roc_api roc_nix_dev_init(struct roc_nix *roc_nix);
 int __roc_api roc_nix_dev_fini(struct roc_nix *roc_nix);
@@ -324,7 +346,6 @@ int __roc_api roc_nix_register_cq_irqs(struct roc_nix *roc_nix);
 void __roc_api roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix);
 
 /* Traffic Management */
-#define ROC_NIX_TM_MAX_SCHED_WT               ((uint8_t)~0)
 #define ROC_NIX_TM_SHAPER_PROFILE_NONE UINT32_MAX
 #define ROC_NIX_TM_NODE_ID_INVALID     UINT32_MAX
 

diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 9dc0c88..cc8e822 100644 (file)
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -256,11 +256,14 @@ struct nix_tm_shaper_data {
 static inline uint64_t
 nix_tm_weight_to_rr_quantum(uint64_t weight)
 {
-       uint64_t max = (roc_model_is_cn9k() ? NIX_CN9K_TM_RR_QUANTUM_MAX :
-                                                   NIX_TM_RR_QUANTUM_MAX);
+       uint64_t max = NIX_CN9K_TM_RR_QUANTUM_MAX;
 
-       weight &= (uint64_t)ROC_NIX_TM_MAX_SCHED_WT;
-       return (weight * max) / ROC_NIX_TM_MAX_SCHED_WT;
+       /* From CN10K onwards, we only configure RR weight */
+       if (!roc_model_is_cn9k())
+               return weight;
+
+       weight &= (uint64_t)max;
+       return (weight * max) / ROC_NIX_CN9K_TM_RR_WEIGHT_MAX;
 }
 
 static inline bool

diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index ad54e17..947320a 100644 (file)
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -223,7 +223,7 @@ nix_tm_node_add(struct roc_nix *roc_nix, struct nix_tm_node *node)
        if (rc)
                return rc;
 
-       if (node->weight > ROC_NIX_TM_MAX_SCHED_WT)
+       if (node->weight > roc_nix_tm_max_sched_wt_get())
                return NIX_ERR_TM_WEIGHT_EXCEED;
 
        /* Maintain minimum weight */

diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c
index 02ee08b..24a5a91 100644 (file)
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -90,6 +90,7 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 {
        struct nix *nix = roc_nix_to_nix_priv(roc_nix);
        uint64_t commit_rate, commit_sz;
+       uint64_t min_burst, max_burst;
        uint64_t peak_rate, peak_sz;
        uint32_t id;
 
@@ -99,6 +100,9 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
        peak_rate = profile->peak.rate;
        peak_sz = profile->peak.size;
 
+       min_burst = NIX_TM_MIN_SHAPER_BURST;
+       max_burst = roc_nix_tm_max_shaper_burst_get();
+
        if (nix_tm_shaper_profile_search(nix, id) && !skip_ins)
                return NIX_ERR_TM_SHAPER_PROFILE_EXISTS;
 
@@ -112,8 +116,7 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 
        /* commit rate and burst size can be enabled/disabled */
        if (commit_rate || commit_sz) {
-               if (commit_sz < NIX_TM_MIN_SHAPER_BURST ||
-                   commit_sz > NIX_TM_MAX_SHAPER_BURST)
+               if (commit_sz < min_burst || commit_sz > max_burst)
                        return NIX_ERR_TM_INVALID_COMMIT_SZ;
                else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL,
                                                  NULL))
@@ -122,8 +125,7 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
 
        /* Peak rate and burst size can be enabled/disabled */
        if (peak_sz || peak_rate) {
-               if (peak_sz < NIX_TM_MIN_SHAPER_BURST ||
-                   peak_sz > NIX_TM_MAX_SHAPER_BURST)
+               if (peak_sz < min_burst || peak_sz > max_burst)
                        return NIX_ERR_TM_INVALID_PEAK_SZ;
                else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL))
                        return NIX_ERR_TM_INVALID_PEAK_RATE;

diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index 6b9543e..00604b1 100644 (file)
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -8,9 +8,23 @@
 static inline uint64_t
 nix_tm_shaper2regval(struct nix_tm_shaper_data *shaper)
 {
-       return (shaper->burst_exponent << 37) | (shaper->burst_mantissa << 29) |
-              (shaper->div_exp << 13) | (shaper->exponent << 9) |
-              (shaper->mantissa << 1);
+       uint64_t regval;
+
+       if (roc_model_is_cn9k()) {
+               regval = (shaper->burst_exponent << 37);
+               regval |= (shaper->burst_mantissa << 29);
+               regval |= (shaper->div_exp << 13);
+               regval |= (shaper->exponent << 9);
+               regval |= (shaper->mantissa << 1);
+               return regval;
+       }
+
+       regval = (shaper->burst_exponent << 44);
+       regval |= (shaper->burst_mantissa << 29);
+       regval |= (shaper->div_exp << 13);
+       regval |= (shaper->exponent << 9);
+       regval |= (shaper->mantissa << 1);
+       return regval;
 }
 
 uint16_t
@@ -178,20 +192,26 @@ uint64_t
 nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,
                         uint64_t *mantissa_p)
 {
+       uint64_t min_burst, max_burst;
        uint64_t exponent, mantissa;
+       uint32_t max_mantissa;
+
+       min_burst = NIX_TM_MIN_SHAPER_BURST;
+       max_burst = roc_nix_tm_max_shaper_burst_get();
 
-       if (value < NIX_TM_MIN_SHAPER_BURST || value > NIX_TM_MAX_SHAPER_BURST)
+       if (value < min_burst || value > max_burst)
                return 0;
 
+       max_mantissa = (roc_model_is_cn9k() ? NIX_CN9K_TM_MAX_BURST_MANTISSA :
+                                             NIX_TM_MAX_BURST_MANTISSA);
        /* Calculate burst exponent and mantissa using
         * the following formula:
         *
-        * value = (((256 + mantissa) << (exponent + 1)
-        / 256)
+        * value = (((256 + mantissa) << (exponent + 1) / 256)
         *
         */
        exponent = NIX_TM_MAX_BURST_EXPONENT;
-       mantissa = NIX_TM_MAX_BURST_MANTISSA;
+       mantissa = max_mantissa;
 
        while (value < (1ull << (exponent + 1)))
                exponent -= 1;
@@ -199,8 +219,7 @@ nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,
        while (value < ((256 + mantissa) << (exponent + 1)) / 256)
                mantissa -= 1;
 
-       if (exponent > NIX_TM_MAX_BURST_EXPONENT ||
-           mantissa > NIX_TM_MAX_BURST_MANTISSA)
+       if (exponent > NIX_TM_MAX_BURST_EXPONENT || mantissa > max_mantissa)
                return 0;
 
        if (exponent_p)
@@ -544,6 +563,7 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node,
        uint64_t rr_quantum;
        uint8_t k = 0;
 
+       /* For CN9K, weight needs to be converted to quantum */
        rr_quantum = nix_tm_weight_to_rr_quantum(node->weight);
 
        /* For children to root, strict prio is default if either
@@ -554,7 +574,7 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node,
                strict_prio = NIX_TM_TL1_DFLT_RR_PRIO;
 
        plt_tm_dbg("Schedule config node %s(%u) lvl %u id %u, "
-                  "prio 0x%" PRIx64 ", rr_quantum 0x%" PRIx64 " (%p)",
+                  "prio 0x%" PRIx64 ", rr_quantum/rr_wt 0x%" PRIx64 " (%p)",
                   nix_tm_hwlvl2str(node->hw_lvl), schq, node->lvl, node->id,
                   strict_prio, rr_quantum, node);