common/cnxk: enable and disable BPHY PTP mode
authorTomasz Duszynski <tduszynski@marvell.com>
Mon, 21 Jun 2021 15:04:22 +0000 (17:04 +0200)
committerThomas Monjalon <thomas@monjalon.net>
Mon, 5 Jul 2021 21:06:57 +0000 (23:06 +0200)
Add support for enabling or disablig PTP mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
drivers/common/cnxk/roc_bphy_cgx.c
drivers/common/cnxk/roc_bphy_cgx.h
drivers/common/cnxk/roc_bphy_cgx_priv.h
drivers/common/cnxk/version.map

index 9fac366..a2da802 100644 (file)
@@ -232,6 +232,27 @@ roc_bphy_cgx_intlbk_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
        return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
 }
 
+static int
+roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                           bool enable)
+{
+       uint64_t scr1, scr0;
+
+       if (roc_model_is_cn10k())
+               return -ENOTSUP;
+
+       if (!roc_cgx)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_PTP_MODE) |
+              FIELD_PREP(SCR1_ETH_CTL_ARGS_ENABLE, enable);
+
+       return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
 int
 roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
                          struct roc_bphy_cgx_link_info *info)
@@ -274,3 +295,15 @@ roc_bphy_cgx_intlbk_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 {
        return roc_bphy_cgx_intlbk_ena_dis(roc_cgx, lmac, false);
 }
+
+int
+roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+       return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, true);
+}
+
+int
+roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+       return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false);
+}
index 9701228..992e2d3 100644 (file)
@@ -94,5 +94,10 @@ __roc_api int roc_bphy_cgx_intlbk_enable(struct roc_bphy_cgx *roc_cgx,
                                         unsigned int lmac);
 __roc_api int roc_bphy_cgx_intlbk_disable(struct roc_bphy_cgx *roc_cgx,
                                          unsigned int lmac);
+__roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx,
+                                        unsigned int lmac);
+__roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx,
+                                         unsigned int lmac);
+
 
 #endif /* _ROC_BPHY_CGX_H_ */
index cb59cac..4e86ae4 100644 (file)
@@ -10,6 +10,7 @@ enum eth_cmd_id {
        ETH_CMD_GET_LINK_STS = 4,
        ETH_CMD_INTERNAL_LBK = 7,
        ETH_CMD_INTF_SHUTDOWN = 12,
+       ETH_CMD_SET_PTP_MODE = 34,
 };
 
 /* event types - cause of interrupt */
index 71437a6..205a060 100644 (file)
@@ -14,6 +14,8 @@ INTERNAL {
        roc_bphy_cgx_get_linkinfo;
        roc_bphy_cgx_intlbk_disable;
        roc_bphy_cgx_intlbk_enable;
+       roc_bphy_cgx_ptp_rx_disable;
+       roc_bphy_cgx_ptp_rx_enable;
        roc_clk_freq_get;
        roc_error_msg_get;
        roc_idev_lmt_base_addr_get;