bus/fslmc: define queues for DPAA2 devices
authorHemant Agrawal <hemant.agrawal@nxp.com>
Tue, 11 Apr 2017 13:37:20 +0000 (19:07 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 19 Apr 2017 13:37:37 +0000 (15:37 +0200)
Before DPAA2 devices can communicate using hardware queues, this patch
adds queue definitions in the FSLMC bus which the DPAA2 devices would
instantiate.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h

index 453fc10..b230e78 100644 (file)
 #include <mc/fsl_mc_sys.h>
 #include <fsl_qbman_portal.h>
 
+#define DPAA2_DQRR_RING_SIZE   16
+       /** <Maximum number of slots available in RX ring*/
 
 #define MC_PORTAL_INDEX                0
 #define NUM_DPIO_REGIONS       2
+#define NUM_DQS_PER_QUEUE       2
 
 /* Maximum release/acquire from QBMAN */
 #define DPAA2_MBUF_MAX_ACQ_REL 7
@@ -77,6 +80,23 @@ struct dpaa2_dpbp_dev {
        uint32_t dpbp_id; /*HW ID for DPBP object */
 };
 
+struct queue_storage_info_t {
+       struct qbman_result *dq_storage[NUM_DQS_PER_QUEUE];
+};
+
+struct dpaa2_queue {
+       struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
+       void *dev;
+       int32_t eventfd;        /*!< Event Fd of this queue */
+       uint32_t fqid;          /*!< Unique ID of this queue */
+       uint8_t tc_index;       /*!< traffic class identifier */
+       uint16_t flow_id;       /*!< To be used by DPAA2 frmework */
+       uint64_t rx_pkts;
+       uint64_t tx_pkts;
+       uint64_t err_pkts;
+       struct queue_storage_info_t *q_storage;
+};
+
 /*! Global MCP list */
 extern void *(*rte_mcp_ptr_list);