eal/arm64: fix precise TSC

In order to get more accurate the cntvct_el0 reading,
SW must invoke isb.

Fixes: ccad39ea0712 ("eal/arm: add cpu cycle operations for ARMv8")
Cc: stable@dpdk.org
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Haifeng Lin <haifeng.lin@huawei.com>

diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
index 68e7c73..da557b6 100644 (file)
--- a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
@@ -62,7 +62,7 @@ rte_rdtsc(void)
 static inline uint64_t
 rte_rdtsc_precise(void)
 {
-       rte_mb();
+       asm volatile("isb" : : : "memory");
        return rte_rdtsc();
 }