endforeach
base_lib = static_library('txgbe_base', sources,
- dependencies: static_rte_eal,
+ dependencies: [static_rte_eal, static_rte_net],
c_args: c_args)
base_objs = base_lib.extract_all_objects(recursive: true)
u16 eeprom_size;
int err = 0;
- DEBUGFUNC("txgbe_init_eeprom_params");
-
if (eeprom->type != txgbe_eeprom_unknown)
return 0;
err = eeprom->read32(hw, TXGBE_SW_REGION_PTR << 1, &eeprom->sw_addr);
if (err) {
- DEBUGOUT("EEPROM read failed.\n");
+ DEBUGOUT("EEPROM read failed.");
return err;
}
- DEBUGOUT("eeprom params: type = %d, size = %d, address bits: "
- "%d %d\n", eeprom->type, eeprom->word_size,
+ DEBUGOUT("eeprom params: type = %d, size = %d, address bits: %d %d",
+ eeprom->type, eeprom->word_size,
eeprom->address_bits, eeprom->sw_addr);
return 0;
u32 i;
u32 swsm;
- DEBUGFUNC("txgbe_get_eeprom_semaphore");
-
-
/* Get SMBI software semaphore between device drivers first */
for (i = 0; i < timeout; i++) {
/*
}
if (i == timeout) {
- DEBUGOUT("Driver can't access the eeprom - SMBI Semaphore "
- "not granted.\n");
+ DEBUGOUT("Driver can't access the eeprom - SMBI Semaphore not granted.");
/*
* this release is particularly important because our attempts
* above to get the semaphore may have succeeded, and if there
* was not granted because we don't have access to the EEPROM
*/
if (i >= timeout) {
- DEBUGOUT("SWESMBI Software EEPROM semaphore not granted.\n");
+ DEBUGOUT("SWESMBI Software EEPROM semaphore not granted.");
txgbe_release_eeprom_semaphore(hw);
status = TXGBE_ERR_EEPROM;
}
} else {
- DEBUGOUT("Software semaphore SMBI between device drivers "
- "not granted.\n");
+ DEBUGOUT("Software semaphore SMBI between device drivers not granted.");
}
return status;
**/
void txgbe_release_eeprom_semaphore(struct txgbe_hw *hw)
{
- DEBUGFUNC("txgbe_release_eeprom_semaphore");
-
wr32m(hw, TXGBE_MNGSWSYNC, TXGBE_MNGSWSYNC_REQ, 0);
wr32m(hw, TXGBE_SWSEM, TXGBE_SWSEM_PF, 0);
txgbe_flush(hw);
u32 addr = (offset << 1);
int err;
- DEBUGFUNC("\n");
-
err = hw->mac.acquire_swfw_sync(hw, mask);
if (err)
return err;
u32 addr = hw->rom.sw_addr + (offset << 1);
int err;
- DEBUGFUNC("\n");
-
err = hw->mac.acquire_swfw_sync(hw, mask);
if (err)
return err;
int err;
u16 buffer[BUFF_SIZE];
- DEBUGFUNC("txgbe_calc_eeprom_checksum");
-
err = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);
if (err) {
- DEBUGOUT("EEPROM read failed\n");
+ DEBUGOUT("EEPROM read failed");
return err;
}
u16 read_checksum = 0;
int err;
- DEBUGFUNC("txgbe_validate_eeprom_checksum");
-
/* Read the first word from the EEPROM. If this times out or fails, do
* not continue or we could be in for a very long wait while every
* EEPROM read fails
*/
err = hw->rom.read16(hw, 0, &checksum);
if (err) {
- DEBUGOUT("EEPROM read failed\n");
+ DEBUGOUT("EEPROM read failed");
return err;
}
err = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);
if (err) {
- DEBUGOUT("EEPROM read failed\n");
+ DEBUGOUT("EEPROM read failed");
return err;
}
*/
if (read_checksum != checksum) {
err = TXGBE_ERR_EEPROM_CHECKSUM;
- DEBUGOUT("EEPROM checksum error\n");
+ DEBUGOUT("EEPROM checksum error");
}
/* If the user cares, return the calculated checksum */
s32 status;
u16 checksum;
- DEBUGFUNC("txgbe_update_eeprom_checksum");
-
/* Read the first word from the EEPROM. If this times out or fails, do
* not continue or we could be in for a very long wait while every
* EEPROM read fails
*/
status = hw->rom.read16(hw, 0, &checksum);
if (status) {
- DEBUGOUT("EEPROM read failed\n");
+ DEBUGOUT("EEPROM read failed");
return status;
}
u32 speed;
bool link_up;
- DEBUGFUNC("txgbe_device_supports_autoneg_fc");
-
switch (hw->phy.media_type) {
case txgbe_media_type_fiber_qsfp:
case txgbe_media_type_fiber:
u32 value = 0;
u64 reg_bp = 0;
- DEBUGFUNC("txgbe_setup_fc");
-
/* Validate the requested mode */
if (hw->fc.strict_ieee && hw->fc.requested_mode == txgbe_fc_rx_pause) {
- DEBUGOUT("txgbe_fc_rx_pause not valid in strict IEEE mode\n");
+ DEBUGOUT("txgbe_fc_rx_pause not valid in strict IEEE mode");
err = TXGBE_ERR_INVALID_LINK_SETTINGS;
goto out;
}
SR_AN_MMD_ADV_REG1_PAUSE_ASM;
break;
default:
- DEBUGOUT("Flow control param set incorrectly\n");
+ DEBUGOUT("Flow control param set incorrectly");
err = TXGBE_ERR_CONFIG;
goto out;
}
TXGBE_MD_DEV_AUTO_NEG, reg_cu);
}
- DEBUGOUT("Set up FC; reg = 0x%08X\n", reg);
+ DEBUGOUT("Set up FC; reg = 0x%08X", reg);
out:
return err;
}
s32 err;
u16 device_caps;
- DEBUGFUNC("txgbe_start_hw");
-
/* Set the media type */
hw->phy.media_type = hw->phy.get_media_type(hw);
/* Setup flow control */
err = txgbe_setup_fc(hw);
if (err != 0 && err != TXGBE_NOT_IMPLEMENTED) {
- DEBUGOUT("Flow control setup failed, returning %d\n", err);
+ DEBUGOUT("Flow control setup failed, returning %d", err);
return err;
}
{
s32 status;
- DEBUGFUNC("txgbe_init_hw");
-
/* Get firmware version */
hw->phy.get_fw_version(hw, &hw->fw_version);
}
if (status != 0)
- DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
+ DEBUGOUT("Failed to initialize HW, STATUS = %d", status);
return status;
}
{
u16 i = 0;
- DEBUGFUNC("txgbe_clear_hw_cntrs");
-
/* QP Stats */
/* don't write clear queue stats */
for (i = 0; i < TXGBE_MAX_QP; i++) {
u32 rar_low;
u16 i;
- DEBUGFUNC("txgbe_get_mac_addr");
-
wr32(hw, TXGBE_ETHADDRIDX, 0);
rar_high = rd32(hw, TXGBE_ETHADDRH);
rar_low = rd32(hw, TXGBE_ETHADDRL);
struct txgbe_bus_info *bus = &hw->bus;
u32 reg;
- DEBUGFUNC("txgbe_set_lan_id_multi_port_pcie");
-
reg = rd32(hw, TXGBE_PORTSTAT);
bus->lan_id = TXGBE_PORTSTAT_ID(reg);
u32 reg_val;
u16 i;
- DEBUGFUNC("txgbe_stop_hw");
-
/*
* Set the adapter_stopped flag so other driver functions stop touching
* the hardware
{
u32 led_reg = rd32(hw, TXGBE_LEDCTL);
- DEBUGFUNC("txgbe_led_on");
-
/* To turn on the LED, set mode to ON. */
led_reg |= index << TXGBE_LEDCTL_ORD_SHIFT;
led_reg |= index;
{
u32 led_reg = rd32(hw, TXGBE_LEDCTL);
- DEBUGFUNC("txgbe_led_off");
-
/* To turn off the LED, set mode to OFF. */
led_reg &= ~(index << TXGBE_LEDCTL_ORD_SHIFT);
led_reg |= index;
{
s32 status = 0;
- DEBUGFUNC("txgbe_validate_mac_addr");
-
/* Make sure it is not a multicast address */
if (TXGBE_IS_MULTICAST(mac_addr)) {
status = TXGBE_ERR_INVALID_MAC_ADDR;
u32 rar_low, rar_high;
u32 rar_entries = hw->mac.num_rar_entries;
- DEBUGFUNC("txgbe_set_rar");
-
/* Make sure we are using a valid rar index range */
if (index >= rar_entries) {
- DEBUGOUT("RAR index %d is out of range.\n", index);
+ DEBUGOUT("RAR index %d is out of range.", index);
return TXGBE_ERR_INVALID_ARGUMENT;
}
u32 rar_high;
u32 rar_entries = hw->mac.num_rar_entries;
- DEBUGFUNC("txgbe_clear_rar");
-
/* Make sure we are using a valid rar index range */
if (index >= rar_entries) {
- DEBUGOUT("RAR index %d is out of range.\n", index);
+ DEBUGOUT("RAR index %d is out of range.", index);
return TXGBE_ERR_INVALID_ARGUMENT;
}
u32 psrctl;
u32 rar_entries = hw->mac.num_rar_entries;
- DEBUGFUNC("txgbe_init_rx_addrs");
-
/*
* If the current mac address is valid, assume it is a software override
* to the permanent address.
/* Get the MAC address from the RAR0 for later reference */
hw->mac.get_mac_addr(hw, hw->mac.addr);
- DEBUGOUT(" Keeping Current RAR0 Addr =%.2X %.2X %.2X ",
+ DEBUGOUT(" Keeping Current RAR0 Addr = "
+ RTE_ETHER_ADDR_PRT_FMT,
hw->mac.addr[0], hw->mac.addr[1],
- hw->mac.addr[2]);
- DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
+ hw->mac.addr[2], hw->mac.addr[3],
hw->mac.addr[4], hw->mac.addr[5]);
} else {
/* Setup the receive address. */
- DEBUGOUT("Overriding MAC Address in RAR[0]\n");
- DEBUGOUT(" New MAC Addr =%.2X %.2X %.2X ",
+ DEBUGOUT("Overriding MAC Address in RAR[0]");
+ DEBUGOUT(" New MAC Addr = "
+ RTE_ETHER_ADDR_PRT_FMT,
hw->mac.addr[0], hw->mac.addr[1],
- hw->mac.addr[2]);
- DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3],
+ hw->mac.addr[2], hw->mac.addr[3],
hw->mac.addr[4], hw->mac.addr[5]);
hw->mac.set_rar(hw, 0, hw->mac.addr, 0, true);
hw->addr_ctrl.rar_used_count = 1;
/* Zero out the other receive addresses. */
- DEBUGOUT("Clearing RAR[1-%d]\n", rar_entries - 1);
+ DEBUGOUT("Clearing RAR[1-%d]", rar_entries - 1);
for (i = 1; i < rar_entries; i++) {
wr32(hw, TXGBE_ETHADDRIDX, i);
wr32(hw, TXGBE_ETHADDRL, 0);
psrctl |= TXGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type);
wr32(hw, TXGBE_PSRCTL, psrctl);
- DEBUGOUT(" Clearing MTA\n");
+ DEBUGOUT(" Clearing MTA");
for (i = 0; i < hw->mac.mcft_size; i++)
wr32(hw, TXGBE_MCADDRTBL(i), 0);
{
u32 vector = 0;
- DEBUGFUNC("txgbe_mta_vector");
-
switch (hw->mac.mc_filter_type) {
case 0: /* use bits [47:36] of the address */
vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
break;
default: /* Invalid mc_filter_type */
- DEBUGOUT("MC filter type param set incorrectly\n");
+ DEBUGOUT("MC filter type param set incorrectly");
ASSERT(0);
break;
}
u32 vector_bit;
u32 vector_reg;
- DEBUGFUNC("txgbe_set_mta");
-
hw->addr_ctrl.mta_in_use++;
vector = txgbe_mta_vector(hw, mc_addr);
- DEBUGOUT(" bit-vector = 0x%03X\n", vector);
+ DEBUGOUT(" bit-vector = 0x%03X", vector);
/*
* The MTA is a register array of 128 32-bit registers. It is treated
u32 i;
u32 vmdq;
- DEBUGFUNC("txgbe_update_mc_addr_list");
-
/*
* Set the new number of MC addresses that we are being requested to
* use.
/* Clear mta_shadow */
if (clear) {
- DEBUGOUT(" Clearing MTA\n");
+ DEBUGOUT(" Clearing MTA");
memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
}
/* Update mta_shadow */
for (i = 0; i < mc_addr_count; i++) {
- DEBUGOUT(" Adding the multicast addresses:\n");
+ DEBUGOUT(" Adding the multicast addresses:");
txgbe_set_mta(hw, next(hw, &mc_addr_list, &vmdq));
}
wr32(hw, TXGBE_PSRCTL, psrctl);
}
- DEBUGOUT("txgbe update mc addr list complete\n");
+ DEBUGOUT("txgbe update mc addr list complete");
return 0;
}
u32 fcrtl, fcrth;
int i;
- DEBUGFUNC("txgbe_fc_enable");
-
/* Validate the water mark configuration */
if (!hw->fc.pause_time) {
err = TXGBE_ERR_INVALID_LINK_SETTINGS;
hw->fc.high_water[i]) {
if (!hw->fc.low_water[i] ||
hw->fc.low_water[i] >= hw->fc.high_water[i]) {
- DEBUGOUT("Invalid water mark configuration\n");
+ DEBUGOUT("Invalid water mark configuration");
err = TXGBE_ERR_INVALID_LINK_SETTINGS;
goto out;
}
fccfg_reg |= TXGBE_TXFCCFG_FC;
break;
default:
- DEBUGOUT("Flow control param set incorrectly\n");
+ DEBUGOUT("Flow control param set incorrectly");
err = TXGBE_ERR_CONFIG;
goto out;
}
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
{
if ((!(adv_reg)) || (!(lp_reg))) {
- DEBUGOUT("Local or link partner's advertised flow control "
- "settings are NULL. Local: %x, link partner: %x\n",
+ DEBUGOUT("Local or link partner's advertised flow control settings are NULL. Local: %x, link partner: %x",
adv_reg, lp_reg);
return TXGBE_ERR_FC_NOT_NEGOTIATED;
}
*/
if (hw->fc.requested_mode == txgbe_fc_full) {
hw->fc.current_mode = txgbe_fc_full;
- DEBUGOUT("Flow Control = FULL.\n");
+ DEBUGOUT("Flow Control = FULL.");
} else {
hw->fc.current_mode = txgbe_fc_rx_pause;
- DEBUGOUT("Flow Control=RX PAUSE frames only\n");
+ DEBUGOUT("Flow Control=RX PAUSE frames only");
}
} else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) &&
(lp_reg & lp_sym) && (lp_reg & lp_asm)) {
hw->fc.current_mode = txgbe_fc_tx_pause;
- DEBUGOUT("Flow Control = TX PAUSE frames only.\n");
+ DEBUGOUT("Flow Control = TX PAUSE frames only.");
} else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) &&
!(lp_reg & lp_sym) && (lp_reg & lp_asm)) {
hw->fc.current_mode = txgbe_fc_rx_pause;
- DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
+ DEBUGOUT("Flow Control = RX PAUSE frames only.");
} else {
hw->fc.current_mode = txgbe_fc_none;
- DEBUGOUT("Flow Control = NONE.\n");
+ DEBUGOUT("Flow Control = NONE.");
}
return 0;
}
u32 speed;
bool link_up;
- DEBUGFUNC("txgbe_fc_autoneg");
-
/*
* AN should have completed when the cable was plugged in.
* Look for reasons to bail out. Bail out if:
u32 timeout = 200;
u32 i;
- DEBUGFUNC("txgbe_acquire_swfw_sync");
-
for (i = 0; i < timeout; i++) {
/*
* SW NVM semaphore bit is used for access to all
u32 mngsem;
u32 swmask = mask;
- DEBUGFUNC("txgbe_release_swfw_sync");
-
txgbe_get_eeprom_semaphore(hw);
mngsem = rd32(hw, TXGBE_MNGSEM);
int i;
u32 secrxreg;
- DEBUGFUNC("txgbe_disable_sec_rx_path");
-
secrxreg = rd32(hw, TXGBE_SECRXCTL);
secrxreg |= TXGBE_SECRXCTL_XDSA;
wr32(hw, TXGBE_SECRXCTL, secrxreg);
/* For informational purposes only */
if (i >= TXGBE_MAX_SECRX_POLL)
- DEBUGOUT("Rx unit being enabled before security "
- "path fully disabled. Continuing with init.\n");
+ DEBUGOUT("Rx unit being enabled before security path fully disabled. Continuing with init.");
return 0;
}
{
u32 secrxreg;
- DEBUGFUNC("txgbe_enable_sec_rx_path");
-
secrxreg = rd32(hw, TXGBE_SECRXCTL);
secrxreg &= ~TXGBE_SECRXCTL_XDSA;
wr32(hw, TXGBE_SECRXCTL, secrxreg);
/* For informational purposes only */
if (i >= TXGBE_MAX_SECTX_POLL)
- PMD_DRV_LOG(DEBUG, "Tx unit being enabled before security "
- "path fully disabled. Continuing with init.");
+ DEBUGOUT("Tx unit being enabled before security path fully disabled. Continuing with init.");
return 0;
}
{
s32 err;
- DEBUGFUNC("txgbe_get_san_mac_addr_offset");
-
/*
* First read the EEPROM pointer to see if the MAC addresses are
* available.
u8 i;
s32 err;
- DEBUGFUNC("txgbe_get_san_mac_addr");
-
/*
* First read the EEPROM pointer to see if the MAC addresses are
* available. If they're not, no point in calling set_lan_id() here.
u16 san_mac_data, san_mac_offset;
u8 i;
- DEBUGFUNC("txgbe_set_san_mac_addr");
-
/* Look for SAN mac address pointer. If not defined, return */
err = txgbe_get_san_mac_addr_offset(hw, &san_mac_offset);
if (err || san_mac_offset == 0 || san_mac_offset == 0xFFFF)
u32 mpsar_lo, mpsar_hi;
u32 rar_entries = hw->mac.num_rar_entries;
- DEBUGFUNC("txgbe_clear_vmdq");
-
/* Make sure we are using a valid rar index range */
if (rar >= rar_entries) {
- DEBUGOUT("RAR index %d is out of range.\n", rar);
+ DEBUGOUT("RAR index %d is out of range.", rar);
return TXGBE_ERR_INVALID_ARGUMENT;
}
u32 mpsar;
u32 rar_entries = hw->mac.num_rar_entries;
- DEBUGFUNC("txgbe_set_vmdq");
-
/* Make sure we are using a valid rar index range */
if (rar >= rar_entries) {
- DEBUGOUT("RAR index %d is out of range.\n", rar);
+ DEBUGOUT("RAR index %d is out of range.", rar);
return TXGBE_ERR_INVALID_ARGUMENT;
}
{
int i;
- DEBUGFUNC("txgbe_init_uta_tables");
- DEBUGOUT(" Clearing UTA\n");
+ DEBUGOUT(" Clearing UTA");
for (i = 0; i < 128; i++)
wr32(hw, TXGBE_UCADDRTBL(i), 0);
* slot we found during our search, else error.
*/
if (!first_empty_slot)
- DEBUGOUT("No space in VLVF.\n");
+ DEBUGOUT("No space in VLVF.");
return first_empty_slot ? first_empty_slot : TXGBE_ERR_NO_SPACE;
}
u32 regidx, vfta_delta, vfta;
s32 err;
- DEBUGFUNC("txgbe_set_vfta");
-
if (vlan > 4095 || vind > 63)
return TXGBE_ERR_PARAM;
u32 portctl;
s32 vlvf_index;
- DEBUGFUNC("txgbe_set_vlvf");
-
if (vlan > 4095 || vind > 63)
return TXGBE_ERR_PARAM;
{
u32 offset;
- DEBUGFUNC("txgbe_clear_vfta");
-
for (offset = 0; offset < hw->mac.vft_size; offset++)
wr32(hw, TXGBE_VLANTBL(offset), 0);
u32 links_reg, links_orig;
u32 i;
- DEBUGFUNC("txgbe_check_mac_link");
-
/* If Crosstalk fix enabled do the sanity check of making sure
* the SFP+ cage is full.
*/
links_reg = rd32(hw, TXGBE_PORTSTAT);
if (links_orig != links_reg) {
- DEBUGOUT("LINKS changed from %08X to %08X\n",
+ DEBUGOUT("LINKS changed from %08X to %08X",
links_orig, links_reg);
}
u16 offset, caps;
u16 alt_san_mac_blk_offset;
- DEBUGFUNC("txgbe_get_wwn_prefix");
-
/* clear output first */
*wwnn_prefix = 0xFFFF;
*wwpn_prefix = 0xFFFF;
**/
s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps)
{
- DEBUGFUNC("txgbe_get_device_caps");
-
hw->rom.readw_sw(hw, TXGBE_DEVICE_CAPS, device_caps);
return 0;
s64 tsv;
u32 ts_stat;
- DEBUGFUNC("txgbe_get_thermal_sensor_data");
-
/* Only support thermal sensors attached to physical port 0 */
if (hw->bus.lan_id != 0)
return TXGBE_NOT_IMPLEMENTED;
{
struct txgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
- DEBUGFUNC("txgbe_init_thermal_sensor_thresh");
-
memset(data, 0, sizeof(struct txgbe_thermal_sensor_data));
if (hw->bus.lan_id != 0)
u32 i = 0;
bool autoneg, link_up = false;
- DEBUGFUNC("txgbe_setup_mac_link_multispeed_fiber");
-
/* Mask off requested but non-supported speeds */
status = hw->mac.get_link_capabilities(hw, &link_speed, &autoneg);
if (status != 0)
/* QSFP module automatically detects MAC link speed */
break;
default:
- DEBUGOUT("Unexpected media type.\n");
+ DEBUGOUT("Unexpected media type.");
break;
}
/* QSFP module automatically detects link speed */
break;
default:
- DEBUGOUT("Unexpected media type.\n");
+ DEBUGOUT("Unexpected media type.");
break;
}
{
s32 status;
- DEBUGFUNC("txgbe_init_shared_code");
-
/*
* Set the mac type
*/
{
s32 err = 0;
- DEBUGFUNC("txgbe_set_mac_type");
-
if (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {
DEBUGOUT("Unsupported vendor id: %x", hw->vendor_id);
return TXGBE_ERR_DEVICE_NOT_SUPPORTED;
break;
}
- DEBUGOUT("found mac: %d, returns: %d\n",
+ DEBUGOUT("found mac: %d, returns: %d",
hw->mac.type, err);
return err;
}
{
struct txgbe_mac_info *mac = &hw->mac;
- DEBUGFUNC("txgbe_init_mac_link_ops");
-
/*
* enable the laser control functions for SFP+ fiber
* and MNG not enabled
struct txgbe_phy_info *phy = &hw->phy;
s32 err = 0;
- DEBUGFUNC("txgbe_init_phy_raptor");
-
if ((hw->device_id & 0xFF) == TXGBE_DEV_ID_QSFP) {
/* Store flag indicating I2C bus access control unit. */
hw->phy.qsfp_shared_i2c_bus = TRUE;
{
s32 err = 0;
- DEBUGFUNC("txgbe_setup_sfp_modules");
-
if (hw->phy.sfp_type == txgbe_sfp_type_unknown)
return 0;
msec_delay(hw->rom.semaphore_delay);
if (err) {
- DEBUGOUT("sfp module setup not complete\n");
+ DEBUGOUT("sfp module setup not complete");
return TXGBE_ERR_SFP_SETUP_NOT_COMPLETE;
}
struct txgbe_rom_info *rom = &hw->rom;
struct txgbe_mbx_info *mbx = &hw->mbx;
- DEBUGFUNC("txgbe_init_ops_pf");
-
/* BUS */
bus->set_lan_id = txgbe_set_lan_id_multi_port;
s32 status = 0;
u32 autoc = 0;
- DEBUGFUNC("txgbe_get_link_capabilities_raptor");
-
/* Check if 1G SFP module. */
if (hw->phy.sfp_type == txgbe_sfp_type_1g_cu_core0 ||
hw->phy.sfp_type == txgbe_sfp_type_1g_cu_core1 ||
{
u32 media_type;
- DEBUGFUNC("txgbe_get_media_type_raptor");
-
if (hw->phy.ffe_set)
txgbe_bp_mode_set(hw);
s32 status = 0;
bool got_lock = false;
- DEBUGFUNC("txgbe_start_mac_link_raptor");
-
UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
/* reset_pipeline requires us to hold this lock as it writes to
**/
void txgbe_flap_tx_laser_multispeed_fiber(struct txgbe_hw *hw)
{
- DEBUGFUNC("txgbe_flap_tx_laser_multispeed_fiber");
-
/* Blocked by MNG FW so bail */
if (txgbe_check_reset_blocked(hw))
return;
esdp_reg &= ~(TXGBE_GPIOBIT_4 | TXGBE_GPIOBIT_5);
break;
default:
- DEBUGOUT("Invalid fixed module speed\n");
+ DEBUGOUT("Invalid fixed module speed");
return;
}
bool link_up = false;
u32 autoc_reg = rd32_epcs(hw, SR_AN_MMD_ADV_REG1);
- DEBUGFUNC("txgbe_setup_mac_link_smartspeed");
-
/* Set autoneg_advertised value based on input link speed */
hw->phy.autoneg_advertised = 0;
out:
if (link_up && link_speed == TXGBE_LINK_SPEED_1GB_FULL)
- DEBUGOUT("Smartspeed has downgraded the link speed "
- "from the maximum advertised\n");
+ DEBUGOUT("Smartspeed has downgraded the link speed from the maximum advertised");
return status;
}
u64 orig_autoc = 0;
u32 link_capabilities = TXGBE_LINK_SPEED_UNKNOWN;
- DEBUGFUNC("txgbe_setup_mac_link");
UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
/* Check to see if speed passed in is supported. */
{
s32 status;
- DEBUGFUNC("txgbe_setup_copper_link_raptor");
-
/* Setup the PHY according to input speed */
status = hw->phy.setup_link_speed(hw, speed,
autoneg_wait_to_complete);
s32 status;
u32 autoc;
- DEBUGFUNC("txgbe_reset_hw");
-
/* Call adapter stop to disable tx/rx and clear interrupts */
status = hw->mac.stop_hw(hw);
if (status != 0)
u32 fdircmd;
fdirctrl &= ~TXGBE_FDIRCTL_INITDONE;
- DEBUGFUNC("txgbe_reinit_fdir_tables");
-
/*
* Before starting reinitialization process,
* FDIRPICMD.OP must be zero.
*/
err = txgbe_fdir_check_cmd_complete(hw, &fdircmd);
if (err) {
- DEBUGOUT("Flow Director previous command did not complete, aborting table re-initialization.\n");
+ DEBUGOUT("Flow Director previous command did not complete, aborting table re-initialization.");
return err;
}
msec_delay(1);
}
if (i >= TXGBE_FDIR_INIT_DONE_POLL) {
- DEBUGOUT("Flow Director Signature poll time exceeded!\n");
+ DEBUGOUT("Flow Director Signature poll time exceeded!");
return TXGBE_ERR_FDIR_REINIT_FAILED;
}
{
s32 err = 0;
- DEBUGFUNC("txgbe_start_hw_raptor");
-
err = txgbe_start_hw(hw);
if (err != 0)
goto out;
**/
s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval)
{
- DEBUGFUNC("txgbe_enable_rx_dma_raptor");
-
/*
* Workaround silicon errata when enabling the Rx datapath.
* If traffic is incoming before we enable the Rx unit, it could hang
u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;
s32 status;
- DEBUGFUNC("txgbe_verify_lesm_fw_enabled_raptor");
-
/* get the offset to the Firmware Module block */
status = hw->rom.read16(hw, TXGBE_FW_PTR, &fw_offset);
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_read_mbx");
-
/* limit read to size of mailbox */
if (size > mbx->size)
size = mbx->size;
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = 0;
- DEBUGFUNC("txgbe_write_mbx");
-
if (size > mbx->size) {
ret_val = TXGBE_ERR_MBX;
DEBUGOUT("Invalid mailbox message size %d", size);
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_check_for_msg");
-
if (mbx->check_for_msg)
ret_val = mbx->check_for_msg(hw, mbx_id);
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_check_for_ack");
-
if (mbx->check_for_ack)
ret_val = mbx->check_for_ack(hw, mbx_id);
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_check_for_rst");
-
if (mbx->check_for_rst)
ret_val = mbx->check_for_rst(hw, mbx_id);
struct txgbe_mbx_info *mbx = &hw->mbx;
int countdown = mbx->timeout;
- DEBUGFUNC("txgbe_poll_for_msg");
-
if (!countdown || !mbx->check_for_msg)
goto out;
struct txgbe_mbx_info *mbx = &hw->mbx;
int countdown = mbx->timeout;
- DEBUGFUNC("txgbe_poll_for_ack");
-
if (!countdown || !mbx->check_for_ack)
goto out;
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_read_posted_mbx");
-
if (!mbx->read)
goto out;
struct txgbe_mbx_info *mbx = &hw->mbx;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_write_posted_mbx");
-
/* exit if either we can't write or there isn't a defined timeout */
if (!mbx->write || !mbx->timeout)
goto out;
s32 ret_val = TXGBE_ERR_MBX;
UNREFERENCED_PARAMETER(mbx_id);
- DEBUGFUNC("txgbe_check_for_msg_vf");
if (!txgbe_check_for_bit_vf(hw, TXGBE_VFMBCTL_PFSTS)) {
ret_val = 0;
s32 ret_val = TXGBE_ERR_MBX;
UNREFERENCED_PARAMETER(mbx_id);
- DEBUGFUNC("txgbe_check_for_ack_vf");
if (!txgbe_check_for_bit_vf(hw, TXGBE_VFMBCTL_PFACK)) {
ret_val = 0;
s32 ret_val = TXGBE_ERR_MBX;
UNREFERENCED_PARAMETER(mbx_id);
- DEBUGFUNC("txgbe_check_for_rst_vf");
if (!txgbe_check_for_bit_vf(hw, (TXGBE_VFMBCTL_RSTD |
TXGBE_VFMBCTL_RSTI))) {
{
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_obtain_mbx_lock_vf");
-
/* Take ownership of the buffer */
wr32(hw, TXGBE_VFMBCTL, TXGBE_VFMBCTL_VFU);
UNREFERENCED_PARAMETER(mbx_id);
- DEBUGFUNC("txgbe_write_mbx_vf");
-
/* lock the mailbox to prevent pf/vf race condition */
ret_val = txgbe_obtain_mbx_lock_vf(hw);
if (ret_val)
s32 ret_val = 0;
u16 i;
- DEBUGFUNC("txgbe_read_mbx_vf");
UNREFERENCED_PARAMETER(mbx_id);
/* lock the mailbox to prevent pf/vf race condition */
s32 index = TXGBE_MBVFICR_INDEX(vf_number);
u32 vf_bit = vf_number % 16;
- DEBUGFUNC("txgbe_check_for_msg_pf");
-
if (!txgbe_check_for_bit_pf(hw, TXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
index)) {
ret_val = 0;
s32 index = TXGBE_MBVFICR_INDEX(vf_number);
u32 vf_bit = vf_number % 16;
- DEBUGFUNC("txgbe_check_for_ack_pf");
-
if (!txgbe_check_for_bit_pf(hw, TXGBE_MBVFICR_VFACK_VF1 << vf_bit,
index)) {
ret_val = 0;
u32 vflre = 0;
s32 ret_val = TXGBE_ERR_MBX;
- DEBUGFUNC("txgbe_check_for_rst_pf");
-
vflre = rd32(hw, TXGBE_FLRVFE(reg_offset));
if (vflre & (1 << vf_shift)) {
ret_val = 0;
s32 ret_val = TXGBE_ERR_MBX;
u32 p2v_mailbox;
- DEBUGFUNC("txgbe_obtain_mbx_lock_pf");
-
/* Take ownership of the buffer */
wr32(hw, TXGBE_MBCTL(vf_number), TXGBE_MBCTL_PFU);
s32 ret_val;
u16 i;
- DEBUGFUNC("txgbe_write_mbx_pf");
-
/* lock the mailbox to prevent pf/vf race condition */
ret_val = txgbe_obtain_mbx_lock_pf(hw, vf_number);
if (ret_val)
s32 ret_val;
u16 i;
- DEBUGFUNC("txgbe_read_mbx_pf");
-
/* lock the mailbox to prevent pf/vf race condition */
ret_val = txgbe_obtain_mbx_lock_pf(hw, vf_number);
if (ret_val)
u32 value, loop;
u16 i, dword_len;
- DEBUGFUNC("txgbe_hic_unlocked");
-
if (!length || length > TXGBE_PMMBX_BSIZE) {
- DEBUGOUT("Buffer length failure buffersize=%d.\n", length);
+ DEBUGOUT("Buffer length failure buffersize=%d.", length);
return TXGBE_ERR_HOST_INTERFACE_COMMAND;
}
TXGBE_MNGMBXCTL_FWRDY, TXGBE_MNGMBXCTL_FWRDY,
&value, timeout, 1000);
if (!loop || !(value & TXGBE_MNGMBXCTL_FWACK)) {
- DEBUGOUT("Command has failed with no status valid.\n");
+ DEBUGOUT("Command has failed with no status valid.");
return TXGBE_ERR_HOST_INTERFACE_COMMAND;
}
if ((rd32(hw, TXGBE_MNGMBX) & 0xff0000) >> 16 == 0x80) {
- DEBUGOUT("It's unknown command.\n");
+ DEBUGOUT("It's unknown command.");
return TXGBE_ERR_MNG_ACCESS_FAILED;
}
u32 bi;
u32 dword_len;
- DEBUGFUNC("txgbe_host_interface_command");
-
if (length == 0 || length > TXGBE_PMMBX_BSIZE) {
- DEBUGOUT("Buffer length failure buffersize=%d.\n", length);
+ DEBUGOUT("Buffer length failure buffersize=%d.", length);
return TXGBE_ERR_HOST_INTERFACE_COMMAND;
}
goto rel_out;
if (length < buf_len + hdr_size) {
- DEBUGOUT("Buffer not large enough for reply message.\n");
+ DEBUGOUT("Buffer not large enough for reply message.");
err = TXGBE_ERR_HOST_INTERFACE_COMMAND;
goto rel_out;
}
s32 status;
struct txgbe_hic_write_shadow_ram buffer;
- DEBUGFUNC("txgbe_close_notify");
-
buffer.hdr.req.cmd = FW_DW_CLOSE_NOTIFY;
buffer.hdr.req.buf_lenh = 0;
buffer.hdr.req.buf_lenl = 0;
s32 status;
struct txgbe_hic_write_shadow_ram buffer;
- DEBUGFUNC("txgbe_open_notify");
-
buffer.hdr.req.cmd = FW_DW_OPEN_NOTIFY;
buffer.hdr.req.buf_lenh = 0;
buffer.hdr.req.buf_lenl = 0;
int i;
s32 ret_val = 0;
- DEBUGFUNC("txgbe_hic_set_drv_ver");
UNREFERENCED_PARAMETER(len, driver_ver);
fw_cmd.hdr.cmd = FW_CEM_CMD_DRIVER_INFO;
int i;
s32 err = 0;
- DEBUGFUNC("\n");
-
reset_cmd.hdr.cmd = FW_RESET_CMD;
reset_cmd.hdr.buf_len = FW_RESET_LEN;
reset_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;
#include <rte_byteorder.h>
#include <rte_config.h>
#include <rte_io.h>
+#include <rte_ether.h>
#include "../txgbe_logs.h"
u16 phy_addr = 0;
if (!txgbe_validate_phy_addr(hw, phy_addr)) {
- DEBUGOUT("Unable to validate PHY address 0x%04X\n",
+ DEBUGOUT("Unable to validate PHY address 0x%04X",
phy_addr);
return false;
}
{
s32 err = TXGBE_ERR_PHY_ADDR_INVALID;
- DEBUGFUNC("txgbe_identify_phy");
-
txgbe_read_phy_if(hw);
if (hw->phy.type != txgbe_phy_unknown)
{
u32 mmngc;
- DEBUGFUNC("txgbe_check_reset_blocked");
-
mmngc = rd32(hw, TXGBE_STAT);
if (mmngc & TXGBE_STAT_MNGVETO) {
- DEBUGOUT("MNG_VETO bit detected.\n");
+ DEBUGOUT("MNG_VETO bit detected.");
return true;
}
u16 phy_id = 0;
bool valid = false;
- DEBUGFUNC("txgbe_validate_phy_addr");
-
hw->phy.addr = phy_addr;
hw->phy.read_reg(hw, TXGBE_MD_PHY_ID_HIGH,
TXGBE_MD_DEV_PMA_PMD, &phy_id);
if (phy_id != 0xFFFF && phy_id != 0x0)
valid = true;
- DEBUGOUT("PHY ID HIGH is 0x%04X\n", phy_id);
+ DEBUGOUT("PHY ID HIGH is 0x%04X", phy_id);
return valid;
}
u16 phy_id_high = 0;
u16 phy_id_low = 0;
- DEBUGFUNC("txgbe_get_phy_id");
-
err = hw->phy.read_reg(hw, TXGBE_MD_PHY_ID_HIGH,
TXGBE_MD_DEV_PMA_PMD,
&phy_id_high);
hw->phy.id |= (u32)(phy_id_low & TXGBE_PHY_REVISION_MASK);
hw->phy.revision = (u32)(phy_id_low & ~TXGBE_PHY_REVISION_MASK);
}
- DEBUGOUT("PHY_ID_HIGH 0x%04X, PHY_ID_LOW 0x%04X\n",
+ DEBUGOUT("PHY_ID_HIGH 0x%04X, PHY_ID_LOW 0x%04X",
phy_id_high, phy_id_low);
return err;
{
enum txgbe_phy_type phy_type;
- DEBUGFUNC("txgbe_get_phy_type_from_id");
-
switch (phy_id) {
case TXGBE_PHYID_TN1010:
phy_type = txgbe_phy_tn;
if (ctrl & TXGBE_MD_PORT_CTRL_RESET) {
err = TXGBE_ERR_RESET_FAILED;
- DEBUGOUT("PHY reset polling failed to complete.\n");
+ DEBUGOUT("PHY reset polling failed to complete.");
}
return err;
{
s32 err = 0;
- DEBUGFUNC("txgbe_reset_phy");
-
if (hw->phy.type == txgbe_phy_unknown)
err = txgbe_identify_phy(hw);
*/
if (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,
0, NULL, 100, 100)) {
- DEBUGOUT("PHY address command did not complete\n");
+ DEBUGOUT("PHY address command did not complete");
return TXGBE_ERR_PHY;
}
s32 err;
u32 gssr = hw->phy.phy_semaphore_mask;
- DEBUGFUNC("txgbe_read_phy_reg");
-
if (hw->mac.acquire_swfw_sync(hw, gssr))
return TXGBE_ERR_SWFW_SYNC;
/* wait for completion */
if (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,
0, NULL, 100, 100)) {
- TLOG_DEBUG("PHY write cmd didn't complete\n");
+ DEBUGOUT("PHY write cmd didn't complete");
return -TERR_PHY;
}
s32 err;
u32 gssr = hw->phy.phy_semaphore_mask;
- DEBUGFUNC("txgbe_write_phy_reg");
-
if (hw->mac.acquire_swfw_sync(hw, gssr))
err = TXGBE_ERR_SWFW_SYNC;
bool autoneg = false;
u32 speed;
- DEBUGFUNC("txgbe_setup_phy_link");
-
txgbe_get_copper_link_capabilities(hw, &speed, &autoneg);
/* Set or unset auto-negotiation 10G advertisement */
{
UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
- DEBUGFUNC("txgbe_setup_phy_link_speed");
-
/*
* Clear autoneg_advertised and set new values based on input link
* speed.
{
s32 err = 0;
- DEBUGFUNC("txgbe_get_copper_link_capabilities");
-
*autoneg = true;
if (!hw->phy.speeds_supported)
err = txgbe_get_copper_speeds_supported(hw);
u16 phy_speed = 0;
u16 phy_data = 0;
- DEBUGFUNC("txgbe_check_phy_link_tnx");
-
/* Initialize speed and link to default case */
*link_up = false;
*speed = TXGBE_LINK_SPEED_10GB_FULL;
bool autoneg = false;
u32 speed;
- DEBUGFUNC("txgbe_setup_phy_link_tnx");
-
txgbe_get_copper_link_capabilities(hw, &speed, &autoneg);
if (speed & TXGBE_LINK_SPEED_10GB_FULL) {
{
s32 err = TXGBE_ERR_SFP_NOT_PRESENT;
- DEBUGFUNC("txgbe_identify_module");
-
switch (hw->phy.media_type) {
case txgbe_media_type_fiber:
err = txgbe_identify_sfp_module(hw);
u8 cable_spec = 0;
u16 enforce_sfp = 0;
- DEBUGFUNC("txgbe_identify_sfp_module");
-
if (hw->phy.media_type != txgbe_media_type_fiber) {
hw->phy.sfp_type = txgbe_sfp_type_not_present;
return TXGBE_ERR_SFP_NOT_PRESENT;
hw->phy.sfp_type == txgbe_sfp_type_1g_lx_core1 ||
hw->phy.sfp_type == txgbe_sfp_type_1g_sx_core0 ||
hw->phy.sfp_type == txgbe_sfp_type_1g_sx_core1)) {
- DEBUGOUT("SFP+ module not supported\n");
+ DEBUGOUT("SFP+ module not supported");
hw->phy.type = txgbe_phy_sfp_unsupported;
return TXGBE_ERR_SFP_NOT_SUPPORTED;
}
u8 device_tech = 0;
bool active_cable = false;
- DEBUGFUNC("txgbe_identify_qsfp_module");
-
if (hw->phy.media_type != txgbe_media_type_fiber_qsfp) {
hw->phy.sfp_type = txgbe_sfp_type_not_present;
err = TXGBE_ERR_SFP_NOT_PRESENT;
if (hw->allow_unsupported_sfp) {
DEBUGOUT("WARNING: Wangxun (R) Network Connections are quality tested using Wangxun (R) Ethernet Optics. "
"Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. "
- "Wangxun Corporation is not responsible for any harm caused by using untested modules.\n");
+ "Wangxun Corporation is not responsible for any harm caused by using untested modules.");
err = 0;
} else {
- DEBUGOUT("QSFP module not supported\n");
+ DEBUGOUT("QSFP module not supported");
hw->phy.type =
txgbe_phy_sfp_unsupported;
err = TXGBE_ERR_SFP_NOT_SUPPORTED;
s32 txgbe_read_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,
u8 *eeprom_data)
{
- DEBUGFUNC("txgbe_read_i2c_eeprom");
-
return hw->phy.read_i2c_byte(hw, byte_offset,
TXGBE_I2C_EEPROM_DEV_ADDR,
eeprom_data);
s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,
u8 eeprom_data)
{
- DEBUGFUNC("txgbe_write_i2c_eeprom");
-
return hw->phy.write_i2c_byte(hw, byte_offset,
TXGBE_I2C_EEPROM_DEV_ADDR,
eeprom_data);
s32 txgbe_read_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 *data)
{
- DEBUGFUNC("txgbe_read_i2c_byte");
-
txgbe_i2c_start(hw, dev_addr);
/* wait tx empty */
s32 txgbe_write_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,
u8 dev_addr, u8 data)
{
- DEBUGFUNC("txgbe_write_i2c_byte");
-
txgbe_i2c_start(hw, dev_addr);
/* wait tx empty */
**/
static void txgbe_i2c_start(struct txgbe_hw *hw, u8 dev_addr)
{
- DEBUGFUNC("txgbe_i2c_start");
-
wr32(hw, TXGBE_I2CENA, 0);
wr32(hw, TXGBE_I2CCON,
**/
static void txgbe_i2c_stop(struct txgbe_hw *hw)
{
- DEBUGFUNC("txgbe_i2c_stop");
-
/* wait for completion */
if (!po32m(hw, TXGBE_I2CSTAT, TXGBE_I2CSTAT_MST,
0, NULL, 100, 100)) {
- DEBUGFUNC("i2c stop timeout.");
+ DEBUGOUT("i2c stop timeout.");
}
wr32(hw, TXGBE_I2CENA, 0);
u32 value;
s32 status = 0;
- DEBUGFUNC("txgbe_kr_handle");
-
value = rd32_epcs(hw, VR_AN_INTR);
BP_LOG("AN INTERRUPT!! value: 0x%x\n", value);
if (!(value & VR_AN_INTR_PG_RCV)) {
s32 status = 0;
struct txgbe_backplane_ability local_ability, lp_ability;
- DEBUGFUNC("txgbe_handle_bp_flow");
-
local_ability.current_link_mode = link_mode;
/* 1. Get the local AN73 Base Page Ability */
{
u32 value = 0;
- DEBUGFUNC("txgbe_get_bp_ability");
-
/* Link Partner Base Page */
if (link_partner == 1) {
/* Read the link partner AN73 Base Page Ability Registers */
u32 com_link_abi;
s32 ret = 0;
- DEBUGFUNC("txgbe_check_bp_ability");
-
com_link_abi = local_ability->link_ability & lp_ability->link_ability;
BP_LOG("com_link_abi = 0x%x, local_ability = 0x%x, lp_ability = 0x%x\n",
com_link_abi, local_ability->link_ability,
{
u32 rdata = 0, wdata, i;
- DEBUGFUNC("txgbe_clear_bp_intr");
-
rdata = rd32_epcs(hw, VR_AN_INTR);
BP_LOG("[Before clear]Read VR AN MMD Interrupt Register: 0x%x\n",
rdata);
s32 status = 0;
u32 value = 0;
- DEBUGFUNC("txgbe_enable_kr_training");
-
BP_LOG("Enable Clause 72 KR Training ...\n");
if (CL72_KRTR_PRBS_MODE_EN != 0xFFFF) {
{
s32 status = 0;
- DEBUGFUNC("txgbe_disable_kr_training");
-
BP_LOG("Disable Clause 72 KR Training ...\n");
/* Read PHY Lane0 TX EQ before Clause 72 KR Training. */
txgbe_read_phy_lane_tx_eq(0, hw, post, mode);
int i;
int times = hw->devarg.poll ? 35 : 20;
- DEBUGFUNC("txgbe_check_kr_training");
-
for (i = 0; i < times; i++) {
value = rd32_epcs(hw, SR_PMA_KR_LP_CEU);
BP_LOG("SR PMA MMD 10GBASE-KR LP Coefficient Update Register: 0x%x\n",
u32 addr;
u32 tx_main_cursor, tx_pre_cursor, tx_post_cursor, lmain;
- DEBUGFUNC("txgbe_read_phy_lane_tx_eq");
-
addr = TXGBE_PHY_LANE0_TX_EQ_CTL1 | (lane << 8);
value = rd32_ephy(hw, addr);
BP_LOG("PHY LANE TX EQ Read Value: %x\n", lane);
u32 msgbuf[TXGBE_VF_PERMADDR_MSG_LEN];
u8 *addr = (u8 *)(&msgbuf[1]);
- DEBUGFUNC("txgbevf_reset_hw_vf");
-
/* Call adapter stop to disable tx/rx and clear interrupts */
hw->mac.stop_hw(hw);
mbx->write_posted(hw, msgbuf, 1, 0);
msec_delay(10);
- DEBUGOUT("Issuing a function level reset to MAC\n");
+ DEBUGOUT("Issuing a function level reset to MAC");
wr32(hw, TXGBE_VFRST, TXGBE_VFRST_SET);
txgbe_flush(hw);
msec_delay(50);
vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
break;
default: /* Invalid mc_filter_type */
- DEBUGOUT("MC filter type param set incorrectly\n");
+ DEBUGOUT("MC filter type param set incorrectly");
ASSERT(0);
break;
}
UNREFERENCED_PARAMETER(clear);
- DEBUGFUNC("txgbe_update_mc_addr_list_vf");
-
/* Each entry in the list uses 1 16 bit word. We have 30
* 16 bit words available in our HW msg buffer (minus 1 for the
* msg type). That's 30 hash values if we pack 'em right. If
* addresses except for in large enterprise network environments.
*/
- DEBUGOUT("MC Addr Count = %d\n", mc_addr_count);
+ DEBUGOUT("MC Addr Count = %d", mc_addr_count);
cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
msgbuf[0] = TXGBE_VF_SET_MULTICAST;
for (i = 0; i < cnt; i++) {
vector = txgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
- DEBUGOUT("Hash value = 0x%03X\n", vector);
+ DEBUGOUT("Hash value = 0x%03X", vector);
vector_list[i] = (u16)vector;
}
#define PMD_TX_FREE_LOG(level, fmt, args...) do { } while (0)
#endif
-#define TLOG_DEBUG(fmt, args...) PMD_DRV_LOG(DEBUG, fmt, ##args)
-
-#define DEBUGOUT(fmt, args...) TLOG_DEBUG(fmt, ##args)
-#define PMD_INIT_FUNC_TRACE() TLOG_DEBUG(" >>")
-#define DEBUGFUNC(fmt) TLOG_DEBUG(fmt)
+#define DEBUGOUT(fmt, args...) PMD_DRV_LOG(DEBUG, fmt, ##args)
+#define PMD_INIT_FUNC_TRACE() PMD_DRV_LOG(DEBUG, ">>")
extern int txgbe_logtype_bp;
#define BP_LOG(fmt, args...) \
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